[Mesa-dev] [PATCH 5/7] radeonsi: add has_draw_indirect_multi flag

Marek Olšák maraeo at gmail.com
Wed Aug 3 17:43:30 UTC 2016


Is this for the latest version of the MULTI packets and not the first
one without indirect_count?

Marek

On Tue, Aug 2, 2016 at 9:41 PM, Nicolai Hähnle <nhaehnle at gmail.com> wrote:
> From: Nicolai Hähnle <nicolai.haehnle at amd.com>
>
> Prefer to use DRAW_(INDEX)_INDIRECT_MULTI when available in the firmware.
>
> Versions for SI and CI already added as provided by the firmware team, but
> keep in mind that they won't currently be used since the radeon kernel module
> has no interface to query the firmware version.
> ---
>  src/gallium/drivers/radeonsi/si_pipe.c       | 12 ++++++++++++
>  src/gallium/drivers/radeonsi/si_pipe.h       |  1 +
>  src/gallium/drivers/radeonsi/si_state_draw.c |  2 +-
>  3 files changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
> index 9304e5c..d2965050 100644
> --- a/src/gallium/drivers/radeonsi/si_pipe.c
> +++ b/src/gallium/drivers/radeonsi/si_pipe.c
> @@ -754,6 +754,18 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
>                 sscreen->b.chip_class >= VI &&
>                 sscreen->b.info.max_se >= 2;
>
> +       sscreen->has_draw_indirect_multi =
> +               (sscreen->b.family >= CHIP_POLARIS10) ||
> +               (sscreen->b.chip_class == VI &&
> +                sscreen->b.info.pfp_fw_version >= 121 &&
> +                sscreen->b.info.me_fw_version >= 87) ||
> +               (sscreen->b.chip_class == CIK &&
> +                sscreen->b.info.pfp_fw_version >= 211 &&
> +                sscreen->b.info.me_fw_version >= 173) ||
> +               (sscreen->b.chip_class == SI &&
> +                sscreen->b.info.pfp_fw_version >= 121 &&
> +                sscreen->b.info.me_fw_version >= 87);
> +
>         sscreen->b.has_cp_dma = true;
>         sscreen->b.has_streamout = true;
>         pipe_mutex_init(sscreen->shader_parts_mutex);
> diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
> index 326b819..bb570bb 100644
> --- a/src/gallium/drivers/radeonsi/si_pipe.h
> +++ b/src/gallium/drivers/radeonsi/si_pipe.h
> @@ -85,6 +85,7 @@ struct si_screen {
>         unsigned                        gs_table_depth;
>         unsigned                        tess_offchip_block_dw_size;
>         bool                            has_distributed_tess;
> +       bool                            has_draw_indirect_multi;
>
>         /* Whether shaders are monolithic (1-part) or separate (3-part). */
>         bool                            use_monolithic_shaders;
> diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
> index 54fe2bb..a918f85 100644
> --- a/src/gallium/drivers/radeonsi/si_state_draw.c
> +++ b/src/gallium/drivers/radeonsi/si_state_draw.c
> @@ -634,7 +634,7 @@ static void si_emit_draw_packets(struct si_context *sctx,
>                         radeon_emit(cs, index_max_size);
>                 }
>
> -               if (sctx->b.family < CHIP_POLARIS10) {
> +               if (!sctx->screen->has_draw_indirect_multi) {
>                         radeon_emit(cs, PKT3(info->indexed ? PKT3_DRAW_INDEX_INDIRECT
>                                                            : PKT3_DRAW_INDIRECT,
>                                              3, render_cond_bit));
> --
> 2.7.4
>
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