[Mesa-dev] [PATCH] anv: gen7/75: enable multisampling (v3)
Jason Ekstrand
jason at jlekstrand.net
Sat Aug 6 06:37:41 UTC 2016
I am going to try and give this a proper look on Monday. Given how sketchy
the multisampling support is on gen7 at the moment, I am a but concerned
that it doesn't fix more tests. What's left to fix for MSAA?
On Aug 5, 2016 4:55 PM, "Lionel Landwerlin" <llandwerlin at gmail.com> wrote:
Fixes the following failures :
dEQP-VK.api.copy_and_blit.resolve_image.whole_4_bit
dEQP-VK.api.copy_and_blit.resolve_image.whole_8_bit
dEQP-VK.api.copy_and_blit.resolve_image.partial_4_bit
dEQP-VK.api.copy_and_blit.resolve_image.partial_8_bit
dEQP-VK.api.copy_and_blit.resolve_image.with_regions_4_bit
dEQP-VK.api.copy_and_blit.resolve_image.with_regions_8_bit
Tested on IVB/HSW
v2: Check pMultisampleState is not NULL
v3: Drop rasterization state rename (Anuj)
Fix value of MultisampleRasterizationMode in 3DSTATE_SF
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Cc: Anuj Phogat <anuj.phogat at gmail.com>
---
src/intel/vulkan/gen7_pipeline.c | 24 +++++++++++++++++-------
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_
pipeline.c
index 6acdd85..5ddb922 100644
--- a/src/intel/vulkan/gen7_pipeline.c
+++ b/src/intel/vulkan/gen7_pipeline.c
@@ -37,6 +37,7 @@
static void
gen7_emit_rs_state(struct anv_pipeline *pipeline,
const VkPipelineRasterizationStateCreateInfo *info,
+ uint32_t samples,
const struct anv_graphics_pipeline_create_info *extra)
{
struct GENX(3DSTATE_SF) sf = {
@@ -56,7 +57,8 @@ gen7_emit_rs_state(struct anv_pipeline *pipeline,
/* uint32_t
LineEndCapAntialiasingRegionWidth; */
.ScissorRectangleEnable = !(extra &&
extra->use_rectlist),
- /* uint32_t
MultisampleRasterizationMode; */
+ .MultisampleRasterizationMode = samples > 1 ?
+ MSRASTMODE_ON_PATTERN :
MSRASTMODE_OFF_PIXEL,
/* bool LastPixelEnable; */
.TriangleStripListProvokingVertexSelect = 0,
@@ -107,8 +109,16 @@ genX(graphics_pipeline_create)(
assert(pCreateInfo->pVertexInputState);
emit_vertex_input(pipeline, pCreateInfo->pVertexInputState, extra);
+ if (pCreateInfo->pMultisampleState &&
+ pCreateInfo->pMultisampleState->rasterizationSamples > 1)
+ anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_
STATE_CREATE_INFO");
+
+ uint32_t samples = pCreateInfo->pMultisampleState ?
+ pCreateInfo->pMultisampleState->rasterizationSamples
: 1;
+
assert(pCreateInfo->pRasterizationState);
- gen7_emit_rs_state(pipeline, pCreateInfo->pRasterizationState, extra);
+ gen7_emit_rs_state(pipeline, pCreateInfo->pRasterizationState,
+ samples, extra);
emit_ds_state(pipeline, pCreateInfo->pDepthStencilState, pass, subpass);
@@ -121,11 +131,6 @@ genX(graphics_pipeline_create)(
pCreateInfo->pRasterizationState, extra);
emit_3dstate_streamout(pipeline, pCreateInfo->pRasterizationState);
- if (pCreateInfo->pMultisampleState &&
- pCreateInfo->pMultisampleState->rasterizationSamples > 1)
- anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_
STATE_CREATE_INFO");
-
- uint32_t samples = 1;
uint32_t log2_samples = __builtin_ffs(samples) - 1;
anv_batch_emit(&pipeline->batch, GENX(3DSTATE_MULTISAMPLE), ms) {
@@ -312,6 +317,11 @@ genX(graphics_pipeline_create)(
}
wm.BarycentricInterpolationMode =
wm_prog_data->barycentric_interp_modes;
+
+ wm.MultisampleRasterizationMode = samples > 1 ?
+ MSRASTMODE_ON_PATTERN :
MSRASTMODE_OFF_PIXEL;
+ wm.MultisampleDispatchMode =
wm_prog_data->persample_dispatch
?
+ MSDISPMODE_PERSAMPLE :
MSDISPMODE_PERPIXEL;
}
}
--
2.8.1
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