[Mesa-dev] [PATCH 4/6] winsys/amdgpu: track the amount of mapped memory

Marek Olšák maraeo at gmail.com
Sat Aug 6 18:04:59 UTC 2016


From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/radeon/radeon_winsys.h    |  2 ++
 src/gallium/winsys/amdgpu/drm/amdgpu_bo.c     | 18 +++++++++++++++++-
 src/gallium/winsys/amdgpu/drm/amdgpu_bo.h     |  1 +
 src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c |  4 ++++
 src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h |  2 ++
 5 files changed, 26 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h
index e7787d3..8284930 100644
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -147,20 +147,22 @@ enum ring_type {
     RING_COMPUTE,
     RING_DMA,
     RING_UVD,
     RING_VCE,
     RING_LAST,
 };
 
 enum radeon_value_id {
     RADEON_REQUESTED_VRAM_MEMORY,
     RADEON_REQUESTED_GTT_MEMORY,
+    RADEON_MAPPED_VRAM,
+    RADEON_MAPPED_GTT,
     RADEON_BUFFER_WAIT_TIME_NS,
     RADEON_TIMESTAMP,
     RADEON_NUM_CS_FLUSHES,
     RADEON_NUM_BYTES_MOVED,
     RADEON_VRAM_USAGE,
     RADEON_GTT_USAGE,
     RADEON_GPU_TEMPERATURE, /* DRM 2.42.0 */
     RADEON_CURRENT_SCLK,
     RADEON_CURRENT_MCLK,
     RADEON_GPU_RESET_COUNTER, /* DRM 2.43.0 */
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
index db2c77f..a4bc474 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
@@ -249,31 +249,47 @@ static void *amdgpu_bo_map(struct pb_buffer *buf,
 
    /* If the buffer is created from user memory, return the user pointer. */
    if (bo->user_ptr)
        return bo->user_ptr;
 
    r = amdgpu_bo_cpu_map(bo->bo, &cpu);
    if (r) {
       /* Clear the cache and try again. */
       pb_cache_release_all_buffers(&bo->ws->bo_cache);
       r = amdgpu_bo_cpu_map(bo->bo, &cpu);
+      if (r)
+         return NULL;
+   }
+
+   if (p_atomic_inc_return(&bo->map_count) == 1) {
+      if (bo->initial_domain & RADEON_DOMAIN_VRAM)
+         bo->ws->mapped_vram += bo->base.size;
+      else
+         bo->ws->mapped_gtt += bo->base.size;
    }
-   return r ? NULL : cpu;
+   return cpu;
 }
 
 static void amdgpu_bo_unmap(struct pb_buffer *buf)
 {
    struct amdgpu_winsys_bo *bo = (struct amdgpu_winsys_bo*)buf;
 
    if (bo->user_ptr)
       return;
 
+   if (p_atomic_dec_zero(&bo->map_count)) {
+      if (bo->initial_domain & RADEON_DOMAIN_VRAM)
+         bo->ws->mapped_vram -= bo->base.size;
+      else
+         bo->ws->mapped_gtt -= bo->base.size;
+   }
+
    amdgpu_bo_cpu_unmap(bo->bo);
 }
 
 static const struct pb_vtbl amdgpu_winsys_bo_vtbl = {
    amdgpu_bo_destroy_or_cache
    /* other functions are never called */
 };
 
 static void amdgpu_add_buffer_to_global_list(struct amdgpu_winsys_bo *bo)
 {
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.h b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.h
index a768771..e2ee049 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.h
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.h
@@ -37,20 +37,21 @@
 #include "pipebuffer/pb_bufmgr.h"
 
 struct amdgpu_winsys_bo {
    struct pb_buffer base;
    struct pb_cache_entry cache_entry;
 
    struct amdgpu_winsys *ws;
    void *user_ptr; /* from buffer_from_ptr */
 
    amdgpu_bo_handle bo;
+   int map_count;
    uint32_t unique_id;
    amdgpu_va_handle va_handle;
    uint64_t va;
    enum radeon_bo_domain initial_domain;
    bool use_reusable_pool;
 
    /* how many command streams is this bo referenced in? */
    int num_cs_references;
 
    /* how many command streams, which are being emitted in a separate
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
index 9a04cbe..3990437 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
@@ -350,20 +350,24 @@ static uint64_t amdgpu_query_value(struct radeon_winsys *rws,
 {
    struct amdgpu_winsys *ws = (struct amdgpu_winsys*)rws;
    struct amdgpu_heap_info heap;
    uint64_t retval = 0;
 
    switch (value) {
    case RADEON_REQUESTED_VRAM_MEMORY:
       return ws->allocated_vram;
    case RADEON_REQUESTED_GTT_MEMORY:
       return ws->allocated_gtt;
+   case RADEON_MAPPED_VRAM:
+      return ws->mapped_vram;
+   case RADEON_MAPPED_GTT:
+      return ws->mapped_gtt;
    case RADEON_BUFFER_WAIT_TIME_NS:
       return ws->buffer_wait_time;
    case RADEON_TIMESTAMP:
       amdgpu_query_info(ws->dev, AMDGPU_INFO_TIMESTAMP, 8, &retval);
       return retval;
    case RADEON_NUM_CS_FLUSHES:
       return ws->num_cs_flushes;
    case RADEON_NUM_BYTES_MOVED:
       amdgpu_query_info(ws->dev, AMDGPU_INFO_NUM_BYTES_MOVED, 8, &retval);
       return retval;
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h
index 8489530..96d4e6d 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h
@@ -46,20 +46,22 @@ struct amdgpu_winsys {
    struct pb_cache bo_cache;
 
    amdgpu_device_handle dev;
 
    pipe_mutex bo_fence_lock;
 
    int num_cs; /* The number of command streams created. */
    uint32_t next_bo_unique_id;
    uint64_t allocated_vram;
    uint64_t allocated_gtt;
+   uint64_t mapped_vram;
+   uint64_t mapped_gtt;
    uint64_t buffer_wait_time; /* time spent in buffer_wait in ns */
    uint64_t num_cs_flushes;
 
    struct radeon_info info;
 
    /* multithreaded IB submission */
    struct util_queue cs_queue;
 
    struct amdgpu_gpu_info amdinfo;
    ADDR_HANDLE addrlib;
-- 
2.7.4



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