[Mesa-dev] [PATCH 4/4] nv50: add PostRADualIssue Pass

[Connor Abbott]

On Sat, Aug 13, 2016 at 3:33 PM, Ilia Mirkin <imirkin at alum.mit.edu> wrote:
> On Sat, Aug 13, 2016 at 3:26 PM, Connor Abbott <cwabbott0 at gmail.com> wrote:
>> So, I don't know much about how nv50 ir works, but to me this just
>> seems like a pretty slow implementation of a very limited instruction
>> scheduler. In addition to the runtime complexity problems you
>> mentioned, you're going to get a lot more benefit even from a very
>> simple list scheduler compared to this, and it generally only takes a
>> few hundred lines to write one. I'd send you some references, but I
>
> I agree with basically all of the above. I really don't think it's
> worth having this super-partial approach. We need a real scheduler,
> both pre- and post-ra. Which follows a reasonable strategy.

Right, although just a post-RA scheduler is probably a good start
here. It's a lot easier to get good results quickly, since you don't
have to worry about register pressure and you'll never make things
worse wrt register pressure. My ir3 scheduler is only 400 lines, a lot
of them comments, and that's 99% of what you need to make a simple
post-RA scheduler. Once you do that, you have a good base to add the
more complicated stuff needed for pre-RA.

>
> I don't think this "just try to dual issue as much as possible
> post-ra" attempt really gets at that. It's a neat hack, but ultimately
> I don't think it's worth having upstream. It's not something that
> we'll be able to build on and improve -- the underlying approach is
> too brute force.
>
>   -ilia