[Mesa-dev] [PATCH v2 21/35] i965/blorp: Use the isl_view from the blorp_surface_info

Pohjolainen, Topi topi.pohjolainen at intel.com
Wed Aug 17 05:36:29 UTC 2016


On Tue, Jul 26, 2016 at 03:02:12PM -0700, Jason Ekstrand wrote:
> ---
>  src/mesa/drivers/dri/i965/brw_blorp.c | 18 +-----------------
>  1 file changed, 1 insertion(+), 17 deletions(-)

Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>

> 
> diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
> index 78707ca..d9b5554 100644
> --- a/src/mesa/drivers/dri/i965/brw_blorp.c
> +++ b/src/mesa/drivers/dri/i965/brw_blorp.c
> @@ -386,22 +386,6 @@ brw_blorp_emit_surface_state(struct brw_context *brw,
>        clear_color = intel_miptree_get_isl_clear_color(brw, surface->mt);
>     }
>  
> -   struct isl_view view = {
> -      .format = surface->view.format,
> -      .base_level = 0,
> -      .levels = 1,
> -      .base_array_layer = 0,
> -      .array_len = 1,
> -      .channel_select = {
> -         ISL_CHANNEL_SELECT_RED,
> -         ISL_CHANNEL_SELECT_GREEN,
> -         ISL_CHANNEL_SELECT_BLUE,
> -         ISL_CHANNEL_SELECT_ALPHA,
> -      },
> -      .usage = is_render_target ? ISL_SURF_USAGE_RENDER_TARGET_BIT :
> -                                  ISL_SURF_USAGE_TEXTURE_BIT,
> -   };
> -
>     uint32_t surf_offset;
>     uint32_t *dw = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
>                                    ss_info.num_dwords * 4, ss_info.ss_align,
> @@ -409,7 +393,7 @@ brw_blorp_emit_surface_state(struct brw_context *brw,
>  
>     const uint32_t mocs = is_render_target ? ss_info.rb_mocs : ss_info.tex_mocs;
>  
> -   isl_surf_fill_state(&brw->isl_dev, dw, .surf = &surf, .view = &view,
> +   isl_surf_fill_state(&brw->isl_dev, dw, .surf = &surf, .view = &surface->view,
>                         .address = surface->mt->bo->offset64 + surface->bo_offset,
>                         .aux_surf = aux_surf, .aux_usage = surface->aux_usage,
>                         .aux_address = aux_offset,
> -- 
> 2.5.0.400.gff86faf
> 
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