[Mesa-dev] [PATCH 2/8] gallium/radeon: increase priority for shader binaries
Marek Olšák
maraeo at gmail.com
Thu Aug 18 19:46:38 UTC 2016
From: Marek Olšák <marek.olsak at amd.com>
---
src/gallium/drivers/radeon/radeon_winsys.h | 2 +-
src/gallium/drivers/radeonsi/si_debug.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h
index cbab406..f4e3773 100644
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -179,21 +179,20 @@ enum radeon_bo_priority {
RADEON_PRIO_IB2, /* IB executed with INDIRECT_BUFFER */
RADEON_PRIO_DRAW_INDIRECT,
RADEON_PRIO_INDEX_BUFFER,
RADEON_PRIO_VCE = 8,
RADEON_PRIO_UVD,
RADEON_PRIO_SDMA_BUFFER,
RADEON_PRIO_SDMA_TEXTURE,
RADEON_PRIO_CP_DMA = 12,
- RADEON_PRIO_SHADER_BINARY,
RADEON_PRIO_CONST_BUFFER = 16,
RADEON_PRIO_DESCRIPTORS,
RADEON_PRIO_BORDER_COLORS,
RADEON_PRIO_SAMPLER_BUFFER = 20,
RADEON_PRIO_VERTEX_BUFFER,
RADEON_PRIO_SHADER_RW_BUFFER = 24,
RADEON_PRIO_COMPUTE_GLOBAL,
@@ -207,20 +206,21 @@ enum radeon_bo_priority {
RADEON_PRIO_DEPTH_BUFFER = 40,
RADEON_PRIO_COLOR_BUFFER_MSAA = 44,
RADEON_PRIO_DEPTH_BUFFER_MSAA = 48,
RADEON_PRIO_CMASK = 52,
RADEON_PRIO_DCC,
RADEON_PRIO_HTILE,
+ RADEON_PRIO_SHADER_BINARY, /* the hw can't hide instruction cache misses */
RADEON_PRIO_SHADER_RINGS = 56,
RADEON_PRIO_SCRATCH_BUFFER = 60,
/* 63 is the maximum value */
};
struct winsys_handle;
struct radeon_winsys_ctx;
diff --git a/src/gallium/drivers/radeonsi/si_debug.c b/src/gallium/drivers/radeonsi/si_debug.c
index 4b500cf..7e75d3f 100644
--- a/src/gallium/drivers/radeonsi/si_debug.c
+++ b/src/gallium/drivers/radeonsi/si_debug.c
@@ -546,38 +546,38 @@ static const char *priority_to_string(enum radeon_bo_priority priority)
ITEM(QUERY),
ITEM(IB1),
ITEM(IB2),
ITEM(DRAW_INDIRECT),
ITEM(INDEX_BUFFER),
ITEM(VCE),
ITEM(UVD),
ITEM(SDMA_BUFFER),
ITEM(SDMA_TEXTURE),
ITEM(CP_DMA),
- ITEM(SHADER_BINARY),
ITEM(CONST_BUFFER),
ITEM(DESCRIPTORS),
ITEM(BORDER_COLORS),
ITEM(SAMPLER_BUFFER),
ITEM(VERTEX_BUFFER),
ITEM(SHADER_RW_BUFFER),
ITEM(COMPUTE_GLOBAL),
ITEM(SAMPLER_TEXTURE),
ITEM(SHADER_RW_IMAGE),
ITEM(SAMPLER_TEXTURE_MSAA),
ITEM(COLOR_BUFFER),
ITEM(DEPTH_BUFFER),
ITEM(COLOR_BUFFER_MSAA),
ITEM(DEPTH_BUFFER_MSAA),
ITEM(CMASK),
ITEM(DCC),
ITEM(HTILE),
+ ITEM(SHADER_BINARY),
ITEM(SHADER_RINGS),
ITEM(SCRATCH_BUFFER),
};
#undef ITEM
assert(priority < ARRAY_SIZE(table));
return table[priority];
}
static int bo_list_compare_va(const struct radeon_bo_list_item *a,
--
2.7.4
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