[Mesa-dev] [PATCH] i965: Detect ability to pass kernel contexts to any rings

Chris Wilson chris at chris-wilson.co.uk
Sat Aug 27 09:51:27 UTC 2016


When originally conceived the kernel context was just a plain wrapper
around the logical HW context. Since then it has evolved into a much
grander partitioning of driver state between different clients, it is
the basis for resource tracking and accountability and has an identical
role to the GL context in providing robustness between clients.
Currently mesa is forced to use a shared context (shared address space,
shared resources) for all non-RCS batches, undermining context
segregation. With the ever increasing importance of the segregation of
driver state, the restriction has been relaxed and now we do a quick
probe from mesa and use the GL context everywhere, see kernel commit
f7978a0c581a ("drm/i915: Allow the user to pass a context to any ring")

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Kenneth Graunke <kenneth at whitecape.org>
Cc: Daniel Vetter <daniel.vetter at ffwll.ch>
---
 src/mesa/drivers/dri/i965/brw_context.c       |  2 ++
 src/mesa/drivers/dri/i965/brw_context.h       |  1 +
 src/mesa/drivers/dri/i965/intel_batchbuffer.c | 13 ++++++-------
 src/mesa/drivers/dri/i965/intel_screen.c      | 23 +++++++++++++++++++++++
 src/mesa/drivers/dri/i965/intel_screen.h      |  1 +
 5 files changed, 33 insertions(+), 7 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 888097d..2145ab8 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -1034,6 +1034,8 @@ brwCreateContext(gl_api api,
          intelDestroyContext(driContextPriv);
          return false;
       }
+      if (brw->intelScreen->has_xcs_contexts)
+         brw->hw_ctx_xcs = brw->hw_ctx;
    }
 
    if (brw_init_pipe_control(brw, devinfo)) {
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 1a4efa3..4e6044c 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -773,6 +773,7 @@ struct brw_context
    dri_bufmgr *bufmgr;
 
    drm_intel_context *hw_ctx;
+   drm_intel_context *hw_ctx_xcs;
 
    /** BO for post-sync nonzero writes for gen6 workaround. */
    drm_intel_bo *workaround_bo;
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index caa33f8..96bc680 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -337,14 +337,18 @@ do_flush_locked(struct brw_context *brw)
    }
 
    if (!brw->intelScreen->no_hw) {
+      drm_intel_context *ctx;
       int flags;
 
       if (brw->gen >= 6 && batch->ring == BLT_RING) {
+         ctx = brw->hw_ctx_xcs;
          flags = I915_EXEC_BLT;
       } else {
+         ctx = brw->hw_ctx;
          flags = I915_EXEC_RENDER |
             (brw->use_resource_streamer ? I915_EXEC_RESOURCE_STREAMER : 0);
       }
+
       if (batch->needs_sol_reset)
 	 flags |= I915_EXEC_GEN7_SOL_RESET;
 
@@ -352,13 +356,8 @@ do_flush_locked(struct brw_context *brw)
          if (unlikely(INTEL_DEBUG & DEBUG_AUB))
             brw_annotate_aub(brw);
 
-	 if (brw->hw_ctx == NULL || batch->ring != RENDER_RING) {
-            ret = drm_intel_bo_mrb_exec(batch->bo, 4 * USED_BATCH(*batch),
-                                        NULL, 0, 0, flags);
-	 } else {
-	    ret = drm_intel_gem_bo_context_exec(batch->bo, brw->hw_ctx,
-                                                4 * USED_BATCH(*batch), flags);
-	 }
+         ret = drm_intel_gem_bo_context_exec(batch->bo, ctx,
+                                             4 * USED_BATCH(*batch), flags);
       }
 
       throttle(brw);
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c
index 84977a7..a2ae83d 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -1129,6 +1129,28 @@ intelDestroyBuffer(__DRIdrawable * driDrawPriv)
     _mesa_reference_framebuffer(&fb, NULL);
 }
 
+static bool
+intel_detect_contexts_blt(struct intel_screen *intelScreen)
+{
+   struct drm_i915_gem_execbuffer2 execbuf;
+   struct drm_i915_gem_exec_object2 exec;
+   int fd = intelScreen->driScrnPriv->fd;
+   int err;
+
+   memset(&exec, 0, sizeof(exec));
+   memset(&execbuf, 0, sizeof(execbuf));
+   execbuf.buffers_ptr = (uintptr_t)&exec;
+   execbuf.buffer_count = 1;
+   execbuf.flags = I915_EXEC_BLT;
+   execbuf.rsvd1 = 0xffffffffu;
+
+   err = 0;
+   if (drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf))
+      err = errno;
+
+   return err == ENOENT;
+}
+
 static void
 intel_detect_sseu(struct intel_screen *intelScreen)
 {
@@ -1618,6 +1640,7 @@ __DRIconfig **intelInitScreen2(__DRIscreen *psp)
       intelScreen->max_gtt_map_object_size = gtt_size / 4;
    }
 
+   intelScreen->has_xcs_contexts = intel_detect_contexts_blt(intelScreen);
    intelScreen->hw_has_swizzling = intel_detect_swizzling(intelScreen);
    intelScreen->hw_has_timestamp = intel_detect_timestamp(intelScreen);
 
diff --git a/src/mesa/drivers/dri/i965/intel_screen.h b/src/mesa/drivers/dri/i965/intel_screen.h
index f62b39f..3f80af3 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.h
+++ b/src/mesa/drivers/dri/i965/intel_screen.h
@@ -48,6 +48,7 @@ struct intel_screen
 
    bool no_hw;
 
+   bool has_xcs_contexts;
    bool hw_has_swizzling;
 
    int hw_has_timestamp;
-- 
2.9.3



More information about the mesa-dev mailing list