[Mesa-dev] [PATCH] radeonsi: add support for cull distances. (v1.1)

[Marek Olšák]

Reviewed-by: Marek Olšák <marek.olsak at amd.com>

Marek

On Mon, Aug 29, 2016 at 4:16 AM, Dave Airlie <airlied at gmail.com> wrote:
> From: Dave Airlie <airlied at redhat.com>
>
> This should be all that is required for cull distances to work
> on radeonsi.
>
> v1.1: whitespace cleanup, add docs fix clipdist_mask usage.
>
> Signed-off-by: Dave Airlie <airlied at redhat.com>
> ---
>  docs/features.txt                       | 2 +-
>  docs/relnotes/12.1.0.html               | 1 +
>  src/gallium/drivers/radeonsi/si_pipe.c  | 2 +-
>  src/gallium/drivers/radeonsi/si_state.c | 7 ++++---
>  4 files changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/docs/features.txt b/docs/features.txt
> index 26e8ff7..4ca1b99 100644
> --- a/docs/features.txt
> +++ b/docs/features.txt
> @@ -211,7 +211,7 @@ GL 4.5, GLSL 4.50:
>    GL_ARB_ES3_1_compatibility                            DONE (i965/gen8+, nvc0, radeonsi)
>    GL_ARB_clip_control                                   DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr)
>    GL_ARB_conditional_render_inverted                    DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr)
> -  GL_ARB_cull_distance                                  DONE (i965, nv50, nvc0, llvmpipe, softpipe, swr)
> +  GL_ARB_cull_distance                                  DONE (i965, nv50, nvc0, radeonsi, llvmpipe, softpipe, swr)
>    GL_ARB_derivative_control                             DONE (i965, nv50, nvc0, r600, radeonsi)
>    GL_ARB_direct_state_access                            DONE (all drivers)
>    GL_ARB_get_texture_sub_image                          DONE (all drivers)
> diff --git a/docs/relnotes/12.1.0.html b/docs/relnotes/12.1.0.html
> index d22d14b..c7f005d 100644
> --- a/docs/relnotes/12.1.0.html
> +++ b/docs/relnotes/12.1.0.html
> @@ -47,6 +47,7 @@ Note: some of the new features are only available with certain drivers.
>  <li>OpenGL ES 3.1 on i965/hsw</li>
>  <li>GL_ARB_ES3_1_compatibility on i965</li>
>  <li>GL_ARB_clear_texture on r600, radeonsi</li>
> +<li>GL_ARB_cull_distance on radeonsi</li>
>  <li>GL_ARB_enhanced_layouts on i965</li>
>  <li>GL_ARB_indirect_parameters on radeonsi</li>
>  <li>GL_ARB_shader_draw_parameters on radeonsi</li>
> diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
> index 8e7d021..8f9e6f5 100644
> --- a/src/gallium/drivers/radeonsi/si_pipe.c
> +++ b/src/gallium/drivers/radeonsi/si_pipe.c
> @@ -399,6 +399,7 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
>         case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
>         case PIPE_CAP_STRING_MARKER:
>         case PIPE_CAP_CLEAR_TEXTURE:
> +       case PIPE_CAP_CULL_DISTANCE:
>                 return 1;
>
>         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
> @@ -448,7 +449,6 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
>         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
>         case PIPE_CAP_VERTEXID_NOBASE:
>         case PIPE_CAP_QUERY_BUFFER_OBJECT:
> -       case PIPE_CAP_CULL_DISTANCE:
>         case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
>         case PIPE_CAP_TGSI_VOTE:
>         case PIPE_CAP_MAX_WINDOW_RECTANGLES:
> diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
> index 25dfe26..375e74b 100644
> --- a/src/gallium/drivers/radeonsi/si_state.c
> +++ b/src/gallium/drivers/radeonsi/si_state.c
> @@ -650,21 +650,22 @@ static void si_emit_clip_regs(struct si_context *sctx, struct r600_atom *atom)
>            info->properties[TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION];
>         unsigned clipdist_mask =
>                 info->writes_clipvertex ? SIX_BITS : info->clipdist_writemask;
> +       unsigned total_mask = clipdist_mask | (info->culldist_writemask << info->num_written_clipdistance);
>
>         radeon_set_context_reg(cs, R_02881C_PA_CL_VS_OUT_CNTL,
>                 S_02881C_USE_VTX_POINT_SIZE(info->writes_psize) |
>                 S_02881C_USE_VTX_EDGE_FLAG(info->writes_edgeflag) |
>                 S_02881C_USE_VTX_RENDER_TARGET_INDX(info->writes_layer) |
>                 S_02881C_USE_VTX_VIEWPORT_INDX(info->writes_viewport_index) |
> -               S_02881C_VS_OUT_CCDIST0_VEC_ENA((clipdist_mask & 0x0F) != 0) |
> -               S_02881C_VS_OUT_CCDIST1_VEC_ENA((clipdist_mask & 0xF0) != 0) |
> +               S_02881C_VS_OUT_CCDIST0_VEC_ENA((total_mask & 0x0F) != 0) |
> +               S_02881C_VS_OUT_CCDIST1_VEC_ENA((total_mask & 0xF0) != 0) |
>                 S_02881C_VS_OUT_MISC_VEC_ENA(info->writes_psize ||
>                                             info->writes_edgeflag ||
>                                             info->writes_layer ||
>                                              info->writes_viewport_index) |
>                 S_02881C_VS_OUT_MISC_SIDE_BUS_ENA(1) |
>                 (sctx->queued.named.rasterizer->clip_plane_enable &
> -                clipdist_mask));
> +                clipdist_mask) | (info->culldist_writemask << 8));
>         radeon_set_context_reg(cs, R_028810_PA_CL_CLIP_CNTL,
>                 sctx->queued.named.rasterizer->pa_cl_clip_cntl |
>                 (clipdist_mask ? 0 :
> --
> 2.5.5
>
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