[Mesa-dev] [PATCH 15/20] radeonsi: don't emit CS_PARTIAL_FLUSH if compute is not used

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

for less noise in the HUD
---
 src/gallium/drivers/radeonsi/si_compute.c    | 1 +
 src/gallium/drivers/radeonsi/si_pipe.h       | 1 +
 src/gallium/drivers/radeonsi/si_state_draw.c | 4 +++-
 3 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index 17a4125..5041761 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -505,20 +505,21 @@ static void si_launch_grid(
 
 	if (program->ir_type == PIPE_SHADER_IR_TGSI)
 		si_setup_tgsi_grid(sctx, info);
 
 	si_ce_pre_draw_synchronization(sctx);
 
 	si_emit_dispatch_packets(sctx, info);
 
 	si_ce_post_draw_synchronization(sctx);
 
+	sctx->compute_is_busy = true;
 	sctx->b.num_compute_calls++;
 	if (sctx->cs_shader_state.uses_scratch)
 		sctx->b.num_spill_compute_calls++;
 
 	if (cs_regalloc_hang)
 		sctx->b.flags |= SI_CONTEXT_CS_PARTIAL_FLUSH;
 }
 
 
 static void si_delete_compute_state(struct pipe_context *ctx, void* state){
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index f6535cf..5c041ce 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -212,20 +212,21 @@ struct si_context {
 	struct si_screen		*screen;
 
 	struct radeon_winsys_cs		*ce_ib;
 	struct radeon_winsys_cs		*ce_preamble_ib;
 	bool				ce_need_synchronization;
 	struct u_suballocator		*ce_suballocator;
 
 	struct si_shader_ctx_state	fixed_func_tcs_shader;
 	LLVMTargetMachineRef		tm; /* only non-threaded compilation */
 	bool				gfx_flush_in_progress;
+	bool				compute_is_busy;
 
 	/* Atoms (direct states). */
 	union si_state_atoms		atoms;
 	unsigned			dirty_atoms; /* mask */
 	/* PM4 states (precomputed immutable states) */
 	union si_state			queued;
 	union si_state			emitted;
 
 	/* Atom declarations. */
 	struct r600_atom		cache_flush;
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 9e50bb2..ddcb904 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -778,24 +778,26 @@ void si_emit_cache_flush(struct si_context *si_ctx, struct r600_atom *atom)
 			 */
 			sctx->num_vs_flushes++;
 			sctx->num_ps_flushes++;
 		} else if (sctx->flags & SI_CONTEXT_VS_PARTIAL_FLUSH) {
 			radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
 			radeon_emit(cs, EVENT_TYPE(V_028A90_VS_PARTIAL_FLUSH) | EVENT_INDEX(4));
 			sctx->num_vs_flushes++;
 		}
 	}
 
-	if (sctx->flags & SI_CONTEXT_CS_PARTIAL_FLUSH) {
+	if (sctx->flags & SI_CONTEXT_CS_PARTIAL_FLUSH &&
+	    si_ctx->compute_is_busy) {
 		radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
 		radeon_emit(cs, EVENT_TYPE(V_028A90_CS_PARTIAL_FLUSH | EVENT_INDEX(4)));
 		sctx->num_cs_flushes++;
+		si_ctx->compute_is_busy = false;
 	}
 
 	/* VGT state synchronization. */
 	if (sctx->flags & SI_CONTEXT_VGT_FLUSH) {
 		radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
 		radeon_emit(cs, EVENT_TYPE(V_028A90_VGT_FLUSH) | EVENT_INDEX(0));
 	}
 	if (sctx->flags & SI_CONTEXT_VGT_STREAMOUT_SYNC) {
 		radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
 		radeon_emit(cs, EVENT_TYPE(V_028A90_VGT_STREAMOUT_SYNC) | EVENT_INDEX(0));
-- 
2.7.4