[Mesa-dev] [PATCH] i965: Pass start_offset to brw_set_uip_jip().
Iago Toral
itoral at igalia.com
Wed Aug 31 14:45:41 UTC 2016
On Tue, 2016-08-30 at 12:08 -0700, Matt Turner wrote:
> Without this, we would pass over the instructions in the SIMD8
> program
> (which is located earlier in the buffer) when brw_set_uip_jip() is
> called to handle the SIMD16 program.
oh, right.
> The assertion about compacted control flow was bogus: halt, cont,
> break
> cannot be compacted because they have both JIP and UIP. Instead, we
> should never see a compacted instruction in this code at all.
Compaction is the last thing we do in the generators right after we
call brw_set_uip_jip(), so this should be fine.
Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>
> ---
> src/mesa/drivers/dri/i965/brw_eu.h | 2 +-
> src/mesa/drivers/dri/i965/brw_eu_emit.c | 14 +++-----------
> src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 2 +-
> src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 2 +-
> 4 files changed, 6 insertions(+), 14 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_eu.h
> b/src/mesa/drivers/dri/i965/brw_eu.h
> index aeb1a76..2898b2f 100644
> --- a/src/mesa/drivers/dri/i965/brw_eu.h
> +++ b/src/mesa/drivers/dri/i965/brw_eu.h
> @@ -526,7 +526,7 @@ void brw_math_invert( struct brw_codegen *p,
>
> void brw_set_src1(struct brw_codegen *p, brw_inst *insn, struct
> brw_reg reg);
>
> -void brw_set_uip_jip(struct brw_codegen *p);
> +void brw_set_uip_jip(struct brw_codegen *p, int start_offset);
>
> enum brw_conditional_mod brw_negate_cmod(uint32_t cmod);
> enum brw_conditional_mod brw_swap_cmod(uint32_t cmod);
> diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
> b/src/mesa/drivers/dri/i965/brw_eu_emit.c
> index 31fe040..6da47f2 100644
> --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
> +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
> @@ -2775,7 +2775,7 @@ brw_find_loop_end(struct brw_codegen *p, int
> start_offset)
> * BREAK, CONT, and HALT instructions to their correct locations.
> */
> void
> -brw_set_uip_jip(struct brw_codegen *p)
> +brw_set_uip_jip(struct brw_codegen *p, int start_offset)
> {
> const struct brw_device_info *devinfo = p->devinfo;
> int offset;
> @@ -2786,17 +2786,9 @@ brw_set_uip_jip(struct brw_codegen *p)
> if (devinfo->gen < 6)
> return;
>
> - for (offset = 0; offset < p->next_insn_offset;
> - offset = next_offset(devinfo, store, offset)) {
> + for (offset = start_offset; offset < p->next_insn_offset; offset
> += 16) {
> brw_inst *insn = store + offset;
> -
> - if (brw_inst_cmpt_control(devinfo, insn)) {
> - /* Fixups for compacted BREAK/CONTINUE not supported yet.
> */
> - assert(brw_inst_opcode(devinfo, insn) != BRW_OPCODE_BREAK
> &&
> - brw_inst_opcode(devinfo, insn) !=
> BRW_OPCODE_CONTINUE &&
> - brw_inst_opcode(devinfo, insn) != BRW_OPCODE_HALT);
> - continue;
> - }
> + assert(brw_inst_cmpt_control(devinfo, insn) == 0);
>
> int block_end_offset = brw_find_next_block_end(p, offset);
> switch (brw_inst_opcode(devinfo, insn)) {
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> index c96e3e9..2f4ba7b 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> @@ -2127,7 +2127,7 @@ fs_generator::generate_code(const cfg_t *cfg,
> int dispatch_width)
> }
> }
>
> - brw_set_uip_jip(p);
> + brw_set_uip_jip(p, start_offset);
> annotation_finalize(&annotation, p->next_insn_offset);
>
> #ifndef NDEBUG
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> index b428d3a..9f94383 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> @@ -2024,7 +2024,7 @@ generate_code(struct brw_codegen *p,
> }
> }
>
> - brw_set_uip_jip(p);
> + brw_set_uip_jip(p, 0);
> annotation_finalize(&annotation, p->next_insn_offset);
>
> #ifndef NDEBUG
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