[Mesa-dev] [PATCH 10/10] i965: use nir loop unrolling pass
Timothy Arceri
timothy.arceri at collabora.com
Tue Dec 6 01:12:28 UTC 2016
V2:
- enable on all gens
---
src/mesa/drivers/dri/i965/brw_compiler.c | 5 ++++-
src/mesa/drivers/dri/i965/brw_nir.c | 22 +++++++++++++++++-----
2 files changed, 21 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_compiler.c b/src/mesa/drivers/dri/i965/brw_compiler.c
index 6a73719..fa8a772 100644
--- a/src/mesa/drivers/dri/i965/brw_compiler.c
+++ b/src/mesa/drivers/dri/i965/brw_compiler.c
@@ -55,6 +55,7 @@ static const struct nir_shader_compiler_options scalar_nir_options = {
.lower_unpack_snorm_4x8 = true,
.lower_unpack_unorm_2x16 = true,
.lower_unpack_unorm_4x8 = true,
+ .max_unroll_iterations = 32,
};
static const struct nir_shader_compiler_options vector_nir_options = {
@@ -75,6 +76,7 @@ static const struct nir_shader_compiler_options vector_nir_options = {
.lower_unpack_unorm_2x16 = true,
.lower_extract_byte = true,
.lower_extract_word = true,
+ .max_unroll_iterations = 32,
};
static const struct nir_shader_compiler_options vector_nir_options_gen6 = {
@@ -92,6 +94,7 @@ static const struct nir_shader_compiler_options vector_nir_options_gen6 = {
.lower_unpack_unorm_2x16 = true,
.lower_extract_byte = true,
.lower_extract_word = true,
+ .max_unroll_iterations = 32,
};
struct brw_compiler *
@@ -119,7 +122,7 @@ brw_compiler_create(void *mem_ctx, const struct gen_device_info *devinfo)
/* We want the GLSL compiler to emit code that uses condition codes */
for (int i = 0; i < MESA_SHADER_STAGES; i++) {
- compiler->glsl_compiler_options[i].MaxUnrollIterations = 32;
+ compiler->glsl_compiler_options[i].MaxUnrollIterations = 0;
compiler->glsl_compiler_options[i].MaxIfDepth =
devinfo->gen < 6 ? 16 : UINT_MAX;
diff --git a/src/mesa/drivers/dri/i965/brw_nir.c b/src/mesa/drivers/dri/i965/brw_nir.c
index 92f1ba7..c6691a9 100644
--- a/src/mesa/drivers/dri/i965/brw_nir.c
+++ b/src/mesa/drivers/dri/i965/brw_nir.c
@@ -396,8 +396,17 @@ brw_nir_lower_cs_shared(nir_shader *nir)
#define OPT_V(pass, ...) NIR_PASS_V(nir, pass, ##__VA_ARGS__)
static nir_shader *
-nir_optimize(nir_shader *nir, bool is_scalar)
+nir_optimize(nir_shader *nir, const struct brw_compiler *compiler,
+ bool is_scalar)
{
+ nir_variable_mode indirect_mask = 0;
+ if (compiler->glsl_compiler_options[nir->stage].EmitNoIndirectInput)
+ indirect_mask |= nir_var_shader_in;
+ if (compiler->glsl_compiler_options[nir->stage].EmitNoIndirectOutput)
+ indirect_mask |= nir_var_shader_out;
+ if (compiler->glsl_compiler_options[nir->stage].EmitNoIndirectTemp)
+ indirect_mask |= nir_var_local;
+
bool progress;
do {
progress = false;
@@ -420,6 +429,9 @@ nir_optimize(nir_shader *nir, bool is_scalar)
OPT(nir_opt_algebraic);
OPT(nir_opt_constant_folding);
OPT(nir_opt_dead_cf);
+ if (nir->options->max_unroll_iterations != 0) {
+ OPT(nir_opt_loop_unroll, indirect_mask);
+ }
OPT(nir_opt_remove_phis);
OPT(nir_opt_undef);
OPT_V(nir_lower_doubles, nir_lower_drcp |
@@ -476,7 +488,7 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir)
OPT(nir_split_var_copies);
- nir = nir_optimize(nir, is_scalar);
+ nir = nir_optimize(nir, compiler, is_scalar);
if (is_scalar) {
OPT_V(nir_lower_load_const_to_scalar);
@@ -496,7 +508,7 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir)
nir_lower_indirect_derefs(nir, indirect_mask);
/* Get rid of split copies */
- nir = nir_optimize(nir, is_scalar);
+ nir = nir_optimize(nir, compiler, is_scalar);
OPT_V(nir_lower_clip_cull_distance_arrays);
@@ -523,7 +535,7 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
bool progress; /* Written by OPT and OPT_V */
(void)progress;
- nir = nir_optimize(nir, is_scalar);
+ nir = nir_optimize(nir, compiler, is_scalar);
if (devinfo->gen >= 6) {
/* Try and fuse multiply-adds */
@@ -612,7 +624,7 @@ brw_nir_apply_sampler_key(nir_shader *nir,
if (nir_lower_tex(nir, &tex_options)) {
nir_validate_shader(nir);
- nir = nir_optimize(nir, is_scalar);
+ nir = nir_optimize(nir, compiler, is_scalar);
}
return nir;
--
2.7.4
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