[Mesa-dev] [PATCH] i965/blit: Remove Yf/Ys tiled check under a FIXME at can_fast_copy_blit
Alejandro PiƱeiro
apinheiro at igalia.com
Tue Dec 6 18:58:19 UTC 2016
The FIXME suggest that the check should be removed.
This change helps the following test:
GL45-CTS.texture_cube_map_array.color_depth_attachments
to pass consistently on Skylake GT3e. Without this patch, on
Skylake GT3e that test has a ~76% pass rate, with some random
intel_do_flush_locked errors now and then.
It works fine on Skylake GT2, though.
---
I didn't analyze too much the code. It was more git history analysis.
When I started to work to solve that test, I remembered that there was
a time in the past that worked, so I just did a git bisect. The more
recent bad commit I found was df210f. In any case, that one just fixed
that check, as became broken with commit 0c02d7. The one that added
the check (and the FIXME) was commit 412c8c.
As the commit message says, that FIXME seems to suggest that is a
provisional change. Although I recognize that the failure is really
specific (for a Skylake model, not failing always), removing the check
gets the test pass consistently, and as far as I see, it didn't
introduce any regression.
src/mesa/drivers/dri/i965/intel_blit.c | 8 --------
1 file changed, 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
index 03a35ee..9f3b4d1 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -487,14 +487,6 @@ can_fast_copy_blit(struct brw_context *brw,
if (brw->gen < 9)
return false;
- /* Enable fast copy blit only if the surfaces are Yf/Ys tiled.
- * FIXME: Based on performance data, remove this condition later to
- * enable for all types of surfaces.
- */
- if (src_tr_mode == INTEL_MIPTREE_TRMODE_NONE &&
- dst_tr_mode == INTEL_MIPTREE_TRMODE_NONE)
- return false;
-
if (logic_op != GL_COPY)
return false;
--
2.9.3
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