[Mesa-dev] [PATCH v3] main: use new driver flag for conservative rasterization state

Marek Olšák maraeo at gmail.com
Tue Dec 13 13:49:51 UTC 2016


Reviewed-by: Marek Olšák <marek.olsak at amd.com>

Marek

On Tue, Dec 13, 2016 at 2:47 PM, Lionel Landwerlin
<lionel.g.landwerlin at intel.com> wrote:
> Hi Marek,
>
> Can I have your r-b with this patch?
>
> Cheers,
>
> -
> Lionel
>
>
> On 12/12/16 12:30, Lionel Landwerlin wrote:
>>
>> Suggested by Marek.
>>
>> v2: Use new driver flag (Marek)
>>
>> v3: Fix i965 comments (Lionel)
>>
>> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
>> Cc: Ilia Mirkin <imirkin at alum.mit.edu>
>> Cc: Marek Olšák <marek.olsak at amd.com>
>> ---
>>   src/mesa/drivers/dri/i965/brw_context.h      | 2 ++
>>   src/mesa/drivers/dri/i965/brw_state_upload.c | 2 ++
>>   src/mesa/drivers/dri/i965/gen8_ps_state.c    | 8 ++++----
>>   src/mesa/drivers/dri/i965/gen8_sf_state.c    | 5 +++--
>>   src/mesa/main/enable.c                       | 4 +++-
>>   src/mesa/main/mtypes.h                       | 5 +++++
>>   6 files changed, 19 insertions(+), 7 deletions(-)
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_context.h
>> b/src/mesa/drivers/dri/i965/brw_context.h
>> index 550eefedcc..dc47fb17c5 100644
>> --- a/src/mesa/drivers/dri/i965/brw_context.h
>> +++ b/src/mesa/drivers/dri/i965/brw_context.h
>> @@ -226,6 +226,7 @@ enum brw_state_id {
>>      BRW_STATE_CC_STATE,
>>      BRW_STATE_BLORP,
>>      BRW_STATE_VIEWPORT_COUNT,
>> +   BRW_STATE_CONSERVATIVE_RASTERIZATION,
>>      BRW_NUM_STATE_BITS
>>   };
>>
>> @@ -316,6 +317,7 @@ enum brw_state_id {
>>   #define BRW_NEW_URB_SIZE                (1ull << BRW_STATE_URB_SIZE)
>>   #define BRW_NEW_CC_STATE                (1ull << BRW_STATE_CC_STATE)
>>   #define BRW_NEW_BLORP                   (1ull << BRW_STATE_BLORP)
>> +#define BRW_NEW_CONSERVATIVE_RASTERIZATION (1ull <<
>> BRW_STATE_CONSERVATIVE_RASTERIZATION)
>>
>>   struct brw_state_flags {
>>      /** State update flags signalled by mesa internals */
>> diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c
>> b/src/mesa/drivers/dri/i965/brw_state_upload.c
>> index b689ae41f6..d0be6acaf0 100644
>> --- a/src/mesa/drivers/dri/i965/brw_state_upload.c
>> +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
>> @@ -529,6 +529,7 @@ void brw_init_state( struct brw_context *brw )
>>      ctx->DriverFlags.NewAtomicBuffer = BRW_NEW_ATOMIC_BUFFER;
>>      ctx->DriverFlags.NewImageUnits = BRW_NEW_IMAGE_UNITS;
>>      ctx->DriverFlags.NewDefaultTessLevels = BRW_NEW_DEFAULT_TESS_LEVELS;
>> +   ctx->DriverFlags.NewIntelConservativeRasterization =
>> BRW_NEW_CONSERVATIVE_RASTERIZATION;
>>   }
>>
>>
>> @@ -663,6 +664,7 @@ static struct dirty_bit_map brw_bits[] = {
>>      DEFINE_BIT(BRW_NEW_CC_STATE),
>>      DEFINE_BIT(BRW_NEW_BLORP),
>>      DEFINE_BIT(BRW_NEW_VIEWPORT_COUNT),
>> +   DEFINE_BIT(BRW_NEW_CONSERVATIVE_RASTERIZATION),
>>      {0, 0, 0}
>>   };
>>
>> diff --git a/src/mesa/drivers/dri/i965/gen8_ps_state.c
>> b/src/mesa/drivers/dri/i965/gen8_ps_state.c
>> index e43192d362..03468267ce 100644
>> --- a/src/mesa/drivers/dri/i965/gen8_ps_state.c
>> +++ b/src/mesa/drivers/dri/i965/gen8_ps_state.c
>> @@ -53,7 +53,7 @@ gen8_upload_ps_extra(struct brw_context *brw,
>>      if (prog_data->persample_dispatch)
>>         dw1 |= GEN8_PSX_SHADER_IS_PER_SAMPLE;
>>
>> -   /* _NEW_POLYGON */
>> +   /* _NEW_MULTISAMPLE | BRW_NEW_CONSERVATIVE_RASTERIZATION */
>>      if (prog_data->uses_sample_mask) {
>>         if (brw->gen >= 9) {
>>            if (prog_data->post_depth_coverage)
>> @@ -131,7 +131,8 @@ const struct brw_tracked_state gen8_ps_extra = {
>>         .brw   = BRW_NEW_BLORP |
>>                  BRW_NEW_CONTEXT |
>>                  BRW_NEW_FRAGMENT_PROGRAM |
>> -               BRW_NEW_FS_PROG_DATA,
>> +               BRW_NEW_FS_PROG_DATA |
>> +               BRW_NEW_CONSERVATIVE_RASTERIZATION,
>>      },
>>      .emit = upload_ps_extra,
>>   };
>> @@ -291,8 +292,7 @@ upload_ps_state(struct brw_context *brw)
>>
>>   const struct brw_tracked_state gen8_ps_state = {
>>      .dirty = {
>> -      .mesa  = _NEW_MULTISAMPLE |
>> -               _NEW_POLYGON,
>> +      .mesa  = _NEW_MULTISAMPLE,
>>         .brw   = BRW_NEW_BATCH |
>>                  BRW_NEW_BLORP |
>>                  BRW_NEW_FS_PROG_DATA,
>> diff --git a/src/mesa/drivers/dri/i965/gen8_sf_state.c
>> b/src/mesa/drivers/dri/i965/gen8_sf_state.c
>> index afe7b52b52..41e94fb504 100644
>> --- a/src/mesa/drivers/dri/i965/gen8_sf_state.c
>> +++ b/src/mesa/drivers/dri/i965/gen8_sf_state.c
>> @@ -319,7 +319,7 @@ upload_raster(struct brw_context *brw)
>>         }
>>      }
>>
>> -   /* _NEW_POLYGON */
>> +   /* BRW_NEW_CONSERVATIVE_RASTERIZATION */
>>      if (ctx->IntelConservativeRasterization) {
>>         if (brw->gen >= 9)
>>            dw1 |= GEN9_RASTER_CONSERVATIVE_RASTERIZATION_ENABLE;
>> @@ -344,7 +344,8 @@ const struct brw_tracked_state gen8_raster_state = {
>>                  _NEW_SCISSOR |
>>                  _NEW_TRANSFORM,
>>         .brw   = BRW_NEW_BLORP |
>> -               BRW_NEW_CONTEXT,
>> +               BRW_NEW_CONTEXT |
>> +               BRW_NEW_CONSERVATIVE_RASTERIZATION,
>>      },
>>      .emit = upload_raster,
>>   };
>> diff --git a/src/mesa/main/enable.c b/src/mesa/main/enable.c
>> index c9f10abb38..669fe167a5 100644
>> --- a/src/mesa/main/enable.c
>> +++ b/src/mesa/main/enable.c
>> @@ -444,7 +444,9 @@ _mesa_set_enable(struct gl_context *ctx, GLenum cap,
>> GLboolean state)
>>               goto invalid_enum_error;
>>            if (ctx->IntelConservativeRasterization == state)
>>               return;
>> -         FLUSH_VERTICES(ctx, _NEW_POLYGON);
>> +         FLUSH_VERTICES(ctx, 0);
>> +         ctx->NewDriverState |=
>> +            ctx->DriverFlags.NewIntelConservativeRasterization;
>>            ctx->IntelConservativeRasterization = state;
>>            break;
>>         case GL_COLOR_LOGIC_OP:
>> diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
>> index 71bd89e510..36d48e2115 100644
>> --- a/src/mesa/main/mtypes.h
>> +++ b/src/mesa/main/mtypes.h
>> @@ -4222,6 +4222,11 @@ struct gl_driver_flags
>>       * gl_context::TessCtrlProgram::patch_default_*
>>       */
>>      uint64_t NewDefaultTessLevels;
>> +
>> +   /**
>> +    * gl_context::IntelConservativeRasterization
>> +    */
>> +   uint64_t NewIntelConservativeRasterization;
>>   };
>>
>>   struct gl_uniform_buffer_binding
>> --
>> 2.11.0
>>
>
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