[Mesa-dev] [PATCH] anv: Fix uniform and storage buffer offset alignment limits.

[Francisco Jerez]

This fixes an apparent regression in a bunch of image store vulkan CTS
tests from commit ad38ba113491869ab0dffed937f7b3dd50e8a735, which
started using OWORD block read messages to implement UBO loads.  The
reason for the failure is that we were giving bogus buffer alignment
limits to the application (1B), so the CTS would happily come back
with descriptor sets pointing at not even word-aligned uniform buffer
addresses.  No idea how these tests could possibly work before while
we were using the sampler to fetch pull constants.

Cc: <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99097
Reported-by: Mark Janes <mark.a.janes at intel.com>
---
 src/intel/vulkan/anv_device.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index e3d278d..9245e5c 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -582,8 +582,8 @@ void anv_GetPhysicalDeviceProperties(
       .viewportSubPixelBits                     = 13, /* We take a float? */
       .minMemoryMapAlignment                    = 4096, /* A page */
       .minTexelBufferOffsetAlignment            = 1,
-      .minUniformBufferOffsetAlignment          = 1,
-      .minStorageBufferOffsetAlignment          = 1,
+      .minUniformBufferOffsetAlignment          = 16,
+      .minStorageBufferOffsetAlignment          = 4,
       .minTexelOffset                           = -8,
       .maxTexelOffset                           = 7,
       .minTexelGatherOffset                     = -32,
-- 
2.10.2