[Mesa-dev] [PATCH 00/23] Compute queues for radv
bas at basnieuwenhuizen.nl
Sun Dec 18 18:59:14 UTC 2016
I finally got the compute queues working for me, tested with CTS, Talos and
The most significant functional changes, besides just implementing different
command formats for the MEC are:
- Fixing a pitch bug that caused VM faults when storing a compressed texture as
RGBA32. Needed for the compute copy functions.
- The image layout implementation is queue dependent, as we can't elminate the
cmask on the compute queue. DCC does not suffer from this yet, as it is
already disabled for textures with image_store or copy usages.
- Rewrote the whole wait idle code, as the shortcut you implemented won't work,
and was causing the *.semaphore.* tests to be failing.
- Removed some of the DMA queue debugging stuff.
Note that the compute queues got an overhaul in CIK with the MEC and I've added
a helper, so we mostly use the non-MEC variant for all differently formatted
packets and stuff I'd guess to be CIK+, but it is completely non-tested on SI.
Furthermore, given the amount of reverse engineering I needed for stuff that was
not really in the open before, I'm not going to implement SI support, especially
not without a SI card.
The series is also available at
Bas Nieuwenhuizen (10):
radv/winsys: Expose number of compute/dma rings.
radv: Use correct pitch for views with different block size.
radv/winsys: Make WaitIdle queue aware.
radv: Implement cache flushing for the MEC.
radv: update vkCmdUpdateBuffer for the MEC.
radv: Implement indirect dispatch for the MEC.
radv: Use RELEASE_MEM packet for MEC timestamp query.
radv: Don't enable CMASK on compute queues.
radv: Create an empty CS per ring type.
radv: Only emit PFP ME syncs for DMA on the GFX queue.
Dave Airlie (13):
radv/winsys: start adding support for DMA/compute queue
radv: start fixing up queue allocate for multiple queues
radv: Store queue family in command buffers.
radv: add a compute shader implementation for buffer to image
radv: implement image->image copies using compute shader
radv/meta: split clear image out into a separate layer clear function
radv: clear image implementation for compute queue
radv: hook compute clears into clear image api.
radv/meta: update header info
radv: init compute queue and avoid initing transfer queues
radv: pass queue index into winsys submission
radv: add semaphore support
radv: expose the compute queue
src/amd/common/sid.h | 1 +
src/amd/vulkan/radv_cmd_buffer.c | 137 +++-
src/amd/vulkan/radv_device.c | 172 ++++-
src/amd/vulkan/radv_image.c | 18 +-
src/amd/vulkan/radv_meta.h | 23 +-
src/amd/vulkan/radv_meta_buffer.c | 4 +-
src/amd/vulkan/radv_meta_bufimage.c | 871 +++++++++++++++++++++-
src/amd/vulkan/radv_meta_clear.c | 280 ++++---
src/amd/vulkan/radv_meta_copy.c | 42 +-
src/amd/vulkan/radv_private.h | 47 +-
src/amd/vulkan/radv_query.c | 29 +-
src/amd/vulkan/radv_radeon_winsys.h | 16 +-
src/amd/vulkan/si_cmd_buffer.c | 47 +-
src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c | 109 ++-
src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.h | 6 +-
src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c | 16 +-
16 files changed, 1559 insertions(+), 259 deletions(-)
More information about the mesa-dev