[Mesa-dev] [PATCH 1/9] i965: Refactor surface resolves prior to draw call
Topi Pohjolainen
topi.pohjolainen at gmail.com
Tue Dec 20 14:45:29 UTC 2016
and move it to brw_draw.c where it will be eventually used.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
src/mesa/drivers/dri/i965/brw_context.c | 174 +------------------------------
src/mesa/drivers/dri/i965/brw_draw.c | 178 ++++++++++++++++++++++++++++++++
src/mesa/drivers/dri/i965/brw_draw.h | 2 +
3 files changed, 181 insertions(+), 173 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 4ca77c7..367cd9d 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -169,66 +169,10 @@ intel_update_framebuffer(struct gl_context *ctx,
fb->DefaultGeometry.NumSamples);
}
-static bool
-intel_disable_rb_aux_buffer(struct brw_context *brw, const drm_intel_bo *bo)
-{
- const struct gl_framebuffer *fb = brw->ctx.DrawBuffer;
- bool found = false;
-
- for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) {
- const struct intel_renderbuffer *irb =
- intel_renderbuffer(fb->_ColorDrawBuffers[i]);
-
- if (irb && irb->mt->bo == bo) {
- found = brw->draw_aux_buffer_disabled[i] = true;
- }
- }
-
- return found;
-}
-
-/* On Gen9 color buffers may be compressed by the hardware (lossless
- * compression). There are, however, format restrictions and care needs to be
- * taken that the sampler engine is capable for re-interpreting a buffer with
- * format different the buffer was originally written with.
- *
- * For example, SRGB formats are not compressible and the sampler engine isn't
- * capable of treating RGBA_UNORM as SRGB_ALPHA. In such a case the underlying
- * color buffer needs to be resolved so that the sampling surface can be
- * sampled as non-compressed (i.e., without the auxiliary MCS buffer being
- * set).
- */
-static bool
-intel_texture_view_requires_resolve(struct brw_context *brw,
- struct intel_texture_object *intel_tex)
-{
- if (brw->gen < 9 ||
- !intel_miptree_is_lossless_compressed(brw, intel_tex->mt))
- return false;
-
- const uint32_t brw_format = brw_format_for_mesa_format(intel_tex->_Format);
-
- if (isl_format_supports_lossless_compression(&brw->screen->devinfo,
- brw_format))
- return false;
-
- perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
- _mesa_get_format_name(intel_tex->_Format),
- _mesa_get_format_name(intel_tex->mt->format));
-
- if (intel_disable_rb_aux_buffer(brw, intel_tex->mt->bo))
- perf_debug("Sampling renderbuffer with non-compressible format - "
- "turning off compression");
-
- return true;
-}
-
static void
intel_update_state(struct gl_context * ctx, GLuint new_state)
{
struct brw_context *brw = brw_context(ctx);
- struct intel_texture_object *tex_obj;
- struct intel_renderbuffer *depth_irb;
if (ctx->swrast_context)
_swrast_InvalidateState(ctx, new_state);
@@ -237,123 +181,7 @@ intel_update_state(struct gl_context * ctx, GLuint new_state)
brw->NewGLState |= new_state;
_mesa_unlock_context_textures(ctx);
-
- /* Resolve the depth buffer's HiZ buffer. */
- depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH);
- if (depth_irb)
- intel_renderbuffer_resolve_hiz(brw, depth_irb);
-
- memset(brw->draw_aux_buffer_disabled, 0,
- sizeof(brw->draw_aux_buffer_disabled));
-
- /* Resolve depth buffer and render cache of each enabled texture. */
- int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit;
- for (int i = 0; i <= maxEnabledUnit; i++) {
- if (!ctx->Texture.Unit[i]._Current)
- continue;
- tex_obj = intel_texture_object(ctx->Texture.Unit[i]._Current);
- if (!tex_obj || !tex_obj->mt)
- continue;
- if (intel_miptree_sample_with_hiz(brw, tex_obj->mt))
- intel_miptree_all_slices_resolve_hiz(brw, tex_obj->mt);
- else
- intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt);
- /* Sampling engine understands lossless compression and resolving
- * those surfaces should be skipped for performance reasons.
- */
- const int flags = intel_texture_view_requires_resolve(brw, tex_obj) ?
- 0 : INTEL_MIPTREE_IGNORE_CCS_E;
- intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, flags);
- brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
-
- if (tex_obj->base.StencilSampling ||
- tex_obj->mt->format == MESA_FORMAT_S_UINT8) {
- intel_update_r8stencil(brw, tex_obj->mt);
- }
- }
-
- /* Resolve color for each active shader image. */
- for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
- const struct gl_linked_shader *shader =
- ctx->_Shader->CurrentProgram[i] ?
- ctx->_Shader->CurrentProgram[i]->_LinkedShaders[i] : NULL;
-
- if (unlikely(shader && shader->Program->info.num_images)) {
- for (unsigned j = 0; j < shader->Program->info.num_images; j++) {
- struct gl_image_unit *u = &ctx->ImageUnits[shader->ImageUnits[j]];
- tex_obj = intel_texture_object(u->TexObj);
-
- if (tex_obj && tex_obj->mt) {
- /* Access to images is implemented using indirect messages
- * against data port. Normal render target write understands
- * lossless compression but unfortunately the typed/untyped
- * read/write interface doesn't. Therefore even lossless
- * compressed surfaces need to be resolved prior to accessing
- * them. Hence skip setting INTEL_MIPTREE_IGNORE_CCS_E.
- */
- intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, 0);
-
- if (intel_miptree_is_lossless_compressed(brw, tex_obj->mt) &&
- intel_disable_rb_aux_buffer(brw, tex_obj->mt->bo)) {
- perf_debug("Using renderbuffer as shader image - turning "
- "off lossless compression");
- }
-
- brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
- }
- }
- }
- }
-
- /* Resolve color buffers for non-coherent framebuffer fetch. */
- if (!ctx->Extensions.MESA_shader_framebuffer_fetch &&
- ctx->FragmentProgram._Current &&
- ctx->FragmentProgram._Current->info.outputs_read) {
- const struct gl_framebuffer *fb = ctx->DrawBuffer;
-
- for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) {
- const struct intel_renderbuffer *irb =
- intel_renderbuffer(fb->_ColorDrawBuffers[i]);
-
- if (irb &&
- intel_miptree_resolve_color(
- brw, irb->mt, irb->mt_level, irb->mt_layer, irb->layer_count,
- INTEL_MIPTREE_IGNORE_CCS_E))
- brw_render_cache_set_check_flush(brw, irb->mt->bo);
- }
- }
-
- /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the
- * single-sampled color renderbuffers because the CCS buffer isn't
- * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
- * enabled because otherwise the surface state will be programmed with the
- * linear equivalent format anyway.
- */
- if (brw->gen >= 9 && ctx->Color.sRGBEnabled) {
- struct gl_framebuffer *fb = ctx->DrawBuffer;
- for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
- struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[i];
-
- if (rb == NULL)
- continue;
-
- struct intel_renderbuffer *irb = intel_renderbuffer(rb);
- struct intel_mipmap_tree *mt = irb->mt;
-
- if (mt == NULL ||
- mt->num_samples > 1 ||
- _mesa_get_srgb_format_linear(mt->format) == mt->format)
- continue;
-
- /* Lossless compression is not supported for SRGB formats, it
- * should be impossible to get here with such surfaces.
- */
- assert(!intel_miptree_is_lossless_compressed(brw, mt));
- intel_miptree_all_slices_resolve_color(brw, mt, 0);
- brw_render_cache_set_check_flush(brw, mt->bo);
- }
- }
-
+ brw_resolve_surfaces(ctx);
_mesa_lock_context_textures(ctx);
if (new_state & _NEW_BUFFERS) {
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index d4cc223..2ce782d 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -427,6 +427,184 @@ brw_predraw_set_aux_buffers(struct brw_context *brw)
}
}
+static bool
+intel_disable_rb_aux_buffer(struct brw_context *brw, const drm_intel_bo *bo)
+{
+ const struct gl_framebuffer *fb = brw->ctx.DrawBuffer;
+ bool found = false;
+
+ for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) {
+ const struct intel_renderbuffer *irb =
+ intel_renderbuffer(fb->_ColorDrawBuffers[i]);
+
+ if (irb && irb->mt->bo == bo) {
+ found = brw->draw_aux_buffer_disabled[i] = true;
+ }
+ }
+
+ return found;
+}
+
+/* On Gen9 color buffers may be compressed by the hardware (lossless
+ * compression). There are, however, format restrictions and care needs to be
+ * taken that the sampler engine is capable for re-interpreting a buffer with
+ * format different the buffer was originally written with.
+ *
+ * For example, SRGB formats are not compressible and the sampler engine isn't
+ * capable of treating RGBA_UNORM as SRGB_ALPHA. In such a case the underlying
+ * color buffer needs to be resolved so that the sampling surface can be
+ * sampled as non-compressed (i.e., without the auxiliary MCS buffer being
+ * set).
+ */
+static bool
+intel_texture_view_requires_resolve(struct brw_context *brw,
+ struct intel_texture_object *intel_tex)
+{
+ if (brw->gen < 9 ||
+ !intel_miptree_is_lossless_compressed(brw, intel_tex->mt))
+ return false;
+
+ const uint32_t brw_format = brw_format_for_mesa_format(intel_tex->_Format);
+
+ if (isl_format_supports_lossless_compression(&brw->screen->devinfo,
+ brw_format))
+ return false;
+
+ perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
+ _mesa_get_format_name(intel_tex->_Format),
+ _mesa_get_format_name(intel_tex->mt->format));
+
+ if (intel_disable_rb_aux_buffer(brw, intel_tex->mt->bo))
+ perf_debug("Sampling renderbuffer with non-compressible format - "
+ "turning off compression");
+
+ return true;
+}
+
+void
+brw_resolve_surfaces(struct gl_context *ctx)
+{
+ struct brw_context *brw = brw_context(ctx);
+ struct intel_texture_object *tex_obj;
+
+ /* Resolve the depth buffer's HiZ buffer. */
+ struct intel_renderbuffer *depth_irb =
+ intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH);
+ if (depth_irb)
+ intel_renderbuffer_resolve_hiz(brw, depth_irb);
+
+ memset(brw->draw_aux_buffer_disabled, 0,
+ sizeof(brw->draw_aux_buffer_disabled));
+
+ /* Resolve depth buffer and render cache of each enabled texture. */
+ int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit;
+ for (int i = 0; i <= maxEnabledUnit; i++) {
+ if (!ctx->Texture.Unit[i]._Current)
+ continue;
+ tex_obj = intel_texture_object(ctx->Texture.Unit[i]._Current);
+ if (!tex_obj || !tex_obj->mt)
+ continue;
+ if (intel_miptree_sample_with_hiz(brw, tex_obj->mt))
+ intel_miptree_all_slices_resolve_hiz(brw, tex_obj->mt);
+ else
+ intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt);
+ /* Sampling engine understands lossless compression and resolving
+ * those surfaces should be skipped for performance reasons.
+ */
+ const int flags = intel_texture_view_requires_resolve(brw, tex_obj) ?
+ 0 : INTEL_MIPTREE_IGNORE_CCS_E;
+ intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, flags);
+ brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
+
+ if (tex_obj->base.StencilSampling ||
+ tex_obj->mt->format == MESA_FORMAT_S_UINT8) {
+ intel_update_r8stencil(brw, tex_obj->mt);
+ }
+ }
+
+ /* Resolve color for each active shader image. */
+ for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
+ const struct gl_linked_shader *shader =
+ ctx->_Shader->CurrentProgram[i] ?
+ ctx->_Shader->CurrentProgram[i]->_LinkedShaders[i] : NULL;
+
+ if (unlikely(shader && shader->Program->info.num_images)) {
+ for (unsigned j = 0; j < shader->Program->info.num_images; j++) {
+ struct gl_image_unit *u = &ctx->ImageUnits[shader->ImageUnits[j]];
+ tex_obj = intel_texture_object(u->TexObj);
+
+ if (tex_obj && tex_obj->mt) {
+ /* Access to images is implemented using indirect messages
+ * against data port. Normal render target write understands
+ * lossless compression but unfortunately the typed/untyped
+ * read/write interface doesn't. Therefore even lossless
+ * compressed surfaces need to be resolved prior to accessing
+ * them. Hence skip setting INTEL_MIPTREE_IGNORE_CCS_E.
+ */
+ intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, 0);
+
+ if (intel_miptree_is_lossless_compressed(brw, tex_obj->mt) &&
+ intel_disable_rb_aux_buffer(brw, tex_obj->mt->bo)) {
+ perf_debug("Using renderbuffer as shader image - turning "
+ "off lossless compression");
+ }
+
+ brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
+ }
+ }
+ }
+ }
+
+ /* Resolve color buffers for non-coherent framebuffer fetch. */
+ if (!ctx->Extensions.MESA_shader_framebuffer_fetch &&
+ ctx->FragmentProgram._Current &&
+ ctx->FragmentProgram._Current->info.outputs_read) {
+ const struct gl_framebuffer *fb = ctx->DrawBuffer;
+
+ for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) {
+ const struct intel_renderbuffer *irb =
+ intel_renderbuffer(fb->_ColorDrawBuffers[i]);
+
+ if (irb &&
+ intel_miptree_resolve_color(
+ brw, irb->mt, irb->mt_level, irb->mt_layer, irb->layer_count,
+ INTEL_MIPTREE_IGNORE_CCS_E))
+ brw_render_cache_set_check_flush(brw, irb->mt->bo);
+ }
+ }
+
+ /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the
+ * single-sampled color renderbuffers because the CCS buffer isn't
+ * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
+ * enabled because otherwise the surface state will be programmed with the
+ * linear equivalent format anyway.
+ */
+ if (brw->gen >= 9 && ctx->Color.sRGBEnabled) {
+ struct gl_framebuffer *fb = ctx->DrawBuffer;
+ for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
+ struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[i];
+
+ if (rb == NULL)
+ continue;
+
+ struct intel_renderbuffer *irb = intel_renderbuffer(rb);
+ struct intel_mipmap_tree *mt = irb->mt;
+
+ if (mt == NULL ||
+ mt->num_samples > 1 ||
+ _mesa_get_srgb_format_linear(mt->format) == mt->format)
+ continue;
+
+ /* Lossless compression is not supported for SRGB formats, it
+ * should be impossible to get here with such surfaces.
+ */
+ assert(!intel_miptree_is_lossless_compressed(brw, mt));
+ intel_miptree_all_slices_resolve_color(brw, mt, 0);
+ brw_render_cache_set_check_flush(brw, mt->bo);
+ }
+ }
+}
+
/* May fail if out of video memory for texture or vbo upload, or on
* fallback conditions.
*/
diff --git a/src/mesa/drivers/dri/i965/brw_draw.h b/src/mesa/drivers/dri/i965/brw_draw.h
index 64ad9b5..17688ab 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.h
+++ b/src/mesa/drivers/dri/i965/brw_draw.h
@@ -44,6 +44,8 @@ brw_emit_vertex_buffer_state(struct brw_context *brw,
#define EMIT_VERTEX_BUFFER_STATE(...) __map = \
brw_emit_vertex_buffer_state(__VA_ARGS__, __map)
+void brw_resolve_surfaces(struct gl_context *ctx);
+
void brw_draw_prims(struct gl_context *ctx,
const struct _mesa_prim *prims,
GLuint nr_prims,
--
2.5.5
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