[Mesa-dev] [PATCH 03/18] radeonsi: move SPI_PS_INPUT_CNTL value computation to a separate function
Nicolai Hähnle
nhaehnle at gmail.com
Fri Feb 5 20:51:10 UTC 2016
On 05.02.2016 14:20, Marek Olšák wrote:
> From: Marek Olšák <marek.olsak at amd.com>
>
> ---
> src/gallium/drivers/radeonsi/si_state_shaders.c | 74 +++++++++++++------------
> 1 file changed, 40 insertions(+), 34 deletions(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
> index 8613af2..fbe0e37 100644
> --- a/src/gallium/drivers/radeonsi/si_state_shaders.c
> +++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
> @@ -1087,14 +1087,50 @@ static void si_delete_shader_selector(struct pipe_context *ctx, void *state)
> free(sel);
> }
>
> +static unsigned si_get_ps_input_cntl(struct si_context *sctx,
> + struct si_shader *vs, unsigned name,
> + unsigned index, unsigned interpolate)
> +{
> + struct tgsi_shader_info *vsinfo = &vs->selector->info;
> + unsigned j, tmp = 0;
Instead of tmp, it would be nicer to call this variable ps_input_cntl.
Either way, patches 1-3 are
Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
> + if (interpolate == TGSI_INTERPOLATE_CONSTANT ||
> + (interpolate == TGSI_INTERPOLATE_COLOR && sctx->flatshade))
> + tmp |= S_028644_FLAT_SHADE(1);
> +
> + if (name == TGSI_SEMANTIC_PCOORD ||
> + (name == TGSI_SEMANTIC_TEXCOORD &&
> + sctx->sprite_coord_enable & (1 << index))) {
> + tmp |= S_028644_PT_SPRITE_TEX(1);
> + }
> +
> + for (j = 0; j < vsinfo->num_outputs; j++) {
> + if (name == vsinfo->output_semantic_name[j] &&
> + index == vsinfo->output_semantic_index[j]) {
> + tmp |= S_028644_OFFSET(vs->vs_output_param_offset[j]);
> + break;
> + }
> + }
> +
> + if (name == TGSI_SEMANTIC_PRIMID)
> + /* PrimID is written after the last output. */
> + tmp |= S_028644_OFFSET(vs->vs_output_param_offset[vsinfo->num_outputs]);
> + else if (j == vsinfo->num_outputs && !G_028644_PT_SPRITE_TEX(tmp)) {
> + /* No corresponding output found, load defaults into input.
> + * Don't set any other bits.
> + * (FLAT_SHADE=1 completely changes behavior) */
> + tmp = S_028644_OFFSET(0x20);
> + }
> + return tmp;
> +}
> +
> static void si_emit_spi_map(struct si_context *sctx, struct r600_atom *atom)
> {
> struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
> struct si_shader *ps = sctx->ps_shader.current;
> struct si_shader *vs = si_get_vs_state(sctx);
> struct tgsi_shader_info *psinfo;
> - struct tgsi_shader_info *vsinfo = &vs->selector->info;
> - unsigned i, j, tmp, num_written = 0;
> + unsigned i, num_written = 0;
>
> if (!ps || !ps->nparam)
> return;
> @@ -1109,38 +1145,8 @@ static void si_emit_spi_map(struct si_context *sctx, struct r600_atom *atom)
> unsigned interpolate = psinfo->input_interpolate[i];
> unsigned param_offset = ps->ps_input_param_offset[i];
> bcolor:
> - tmp = 0;
> -
> - if (interpolate == TGSI_INTERPOLATE_CONSTANT ||
> - (interpolate == TGSI_INTERPOLATE_COLOR && sctx->flatshade))
> - tmp |= S_028644_FLAT_SHADE(1);
> -
> - if (name == TGSI_SEMANTIC_PCOORD ||
> - (name == TGSI_SEMANTIC_TEXCOORD &&
> - sctx->sprite_coord_enable & (1 << index))) {
> - tmp |= S_028644_PT_SPRITE_TEX(1);
> - }
> -
> - for (j = 0; j < vsinfo->num_outputs; j++) {
> - if (name == vsinfo->output_semantic_name[j] &&
> - index == vsinfo->output_semantic_index[j]) {
> - tmp |= S_028644_OFFSET(vs->vs_output_param_offset[j]);
> - break;
> - }
> - }
> -
> - if (name == TGSI_SEMANTIC_PRIMID)
> - /* PrimID is written after the last output. */
> - tmp |= S_028644_OFFSET(vs->vs_output_param_offset[vsinfo->num_outputs]);
> - else if (j == vsinfo->num_outputs && !G_028644_PT_SPRITE_TEX(tmp)) {
> - /* No corresponding output found, load defaults into input.
> - * Don't set any other bits.
> - * (FLAT_SHADE=1 completely changes behavior) */
> - tmp = S_028644_OFFSET(0x20);
> - }
> -
> - assert(param_offset == num_written);
> - radeon_emit(cs, tmp);
> + radeon_emit(cs, si_get_ps_input_cntl(sctx, vs, name, index,
> + interpolate));
> num_written++;
>
> if (name == TGSI_SEMANTIC_COLOR &&
>
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