[Mesa-dev] [PATCH v3] i965/blorp: Fix hiz ops on MSAA surfaces

Alejandro Piñeiro apinheiro at igalia.com
Sat Feb 6 11:01:50 UTC 2016


From: Chris Forbes <chrisf at ijw.co.nz>

Two things were broken here:
- The depth/stencil surface dimensions were broken for MSAA.
- Sample count was programmed incorrectly.

Result was the depth resolve didn't work correctly on MSAA surfaces, and
so sampling the surface later produced garbage.

Fixes the new piglit test arb_texture_multisample-sample-depth, and
various artifacts in 'tesseract' with msaa=4 glineardepth=0.

Fixes freedesktop bug #76396.

Not observed any piglit regressions on Haswell.

v2: Just set brw_hiz_op_params::dst.num_samples rather than adding a
    helper function (Ken).

v3: moved the alignment needed for hiz+msaa to brw_blorp.cpp, as
    suggested by Chad Versace (Alejandro Piñeiro on behalf of Chris
    Forbes)
---

While taking a look to bug #76396, I found that the git commit message
on arb_texture_multisample/sample-depth.c mentions that MSAA+hiz not
working on Haswell was an already know bug. After pinging on IRC Ben
Widawsky pointed me this around one year old review thread.

It seems that the original patch got not updated after Chad Versace
review. Hoping to not stomp on any toe, I made the update myself (so
this v3 update). Even if this update is not accepted, hopefully this
will resume the review process and the bug will be fixed soon.

I re-run piglit on Haswell, so "Not observed any piglit regressions on
Haswell." still applies.

I also slightly changed the commit message to reflect that this patch
fixes bug #76396. Also removed the "Signed-off-by: Chris Forbes
<chrisf at ijw.co.nz>" because is not technically true anymore. Chris can
re-add that again when he push the patch, if accepted.


 src/mesa/drivers/dri/i965/brw_blorp.cpp | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index 1bc6d15..4497eab 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -319,8 +319,14 @@ brw_hiz_op_params::brw_hiz_op_params(struct intel_mipmap_tree *mt,
     * not 8. But commit 1f112cc increased the alignment from 4 to 8, which
     * prevents the clobbering.
     */
-   depth.width = ALIGN(depth.width, 8);
-   depth.height = ALIGN(depth.height, 4);
+   dst.num_samples = mt->num_samples;
+   if (dst.num_samples > 1) {
+      depth.width = ALIGN(mt->logical_width0, 8);
+      depth.height = ALIGN(mt->logical_height0, 4);
+   } else {
+      depth.width = ALIGN(depth.width, 8);
+      depth.height = ALIGN(depth.height, 4);
+   }
 
    x1 = depth.width;
    y1 = depth.height;
-- 
2.1.4



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