[Mesa-dev] [PATCH 06/12] nvc0: bind textures/samplers for compute on Fermi
Ilia Mirkin
imirkin at alum.mit.edu
Sat Feb 6 23:04:59 UTC 2016
Seems like it would make sense to stick these into nvc0_tex along with
the existing 3d functions that these are mostly copying. Perhaps
refactor so that they share logic?
On Sat, Feb 6, 2016 at 5:38 PM, Samuel Pitoiset
<samuel.pitoiset at gmail.com> wrote:
> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
> ---
> src/gallium/drivers/nouveau/nvc0/nvc0_compute.c | 140 +++++++++++++++++++++++-
> src/gallium/drivers/nouveau/nvc0/nvc0_context.h | 2 +
> src/gallium/drivers/nouveau/nvc0/nvc0_tex.c | 2 +-
> 3 files changed, 141 insertions(+), 3 deletions(-)
>
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c b/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c
> index bd399e6..e63bdcb 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c
> @@ -105,7 +105,17 @@ nvc0_screen_compute_setup(struct nvc0_screen *screen,
> PUSH_DATAh(push, screen->text->offset);
> PUSH_DATA (push, screen->text->offset);
>
> - /* TODO: textures & samplers */
> + /* textures */
> + BEGIN_NVC0(push, NVC0_COMPUTE(TIC_ADDRESS_HIGH), 3);
> + PUSH_DATAh(push, screen->txc->offset);
> + PUSH_DATA (push, screen->txc->offset);
> + PUSH_DATA (push, NVC0_TIC_MAX_ENTRIES - 1);
> +
> + /* samplers */
> + BEGIN_NVC0(push, NVC0_COMPUTE(TSC_ADDRESS_HIGH), 3);
> + PUSH_DATAh(push, screen->txc->offset + 65536);
> + PUSH_DATA (push, screen->txc->offset + 65536);
> + PUSH_DATA (push, NVC0_TSC_MAX_ENTRIES - 1);
>
> return 0;
> }
> @@ -139,6 +149,128 @@ nvc0_compute_validate_program(struct nvc0_context *nvc0)
> }
>
> static void
> +nvc0_compute_validate_samplers(struct nvc0_context *nvc0)
> +{
> + uint32_t commands[16];
> + struct nouveau_pushbuf *push = nvc0->base.pushbuf;
> + const int s = 5;
> + unsigned i;
> + unsigned n = 0;
> + bool need_flush = false;
> +
> + for (i = 0; i < nvc0->num_samplers[s]; ++i) {
> + struct nv50_tsc_entry *tsc = nv50_tsc_entry(nvc0->samplers[s][i]);
> +
> + if (!(nvc0->samplers_dirty[s] & (1 << i)))
> + continue;
> + if (!tsc) {
> + commands[n++] = (i << 4) | 0;
> + continue;
> + }
> + if (tsc->id < 0) {
> + tsc->id = nvc0_screen_tsc_alloc(nvc0->screen, tsc);
> +
> + nvc0_m2mf_push_linear(&nvc0->base, nvc0->screen->txc,
> + 65536 + tsc->id * 32, NV_VRAM_DOMAIN(&nvc0->screen->base),
> + 32, tsc->tsc);
> + need_flush = true;
> + }
> + nvc0->screen->tsc.lock[tsc->id / 32] |= 1 << (tsc->id % 32);
> +
> + commands[n++] = (tsc->id << 12) | (i << 4) | 1;
> + }
> + for (; i < nvc0->state.num_samplers[s]; ++i)
> + commands[n++] = (i << 4) | 0;
> +
> + nvc0->state.num_samplers[s] = nvc0->num_samplers[s];
> +
> + if (n) {
> + BEGIN_NIC0(push, NVC0_COMPUTE(BIND_TSC), n);
> + PUSH_DATAp(push, commands, n);
> + }
> + nvc0->samplers_dirty[s] = 0;
> +
> + if (need_flush) {
> + BEGIN_NVC0(push, NVC0_COMPUTE(TSC_FLUSH), 1);
> + PUSH_DATA (push, 0);
> + }
> +}
> +
> +static void
> +nvc0_compute_validate_textures(struct nvc0_context *nvc0)
> +{
> + uint32_t commands[32];
> + struct nouveau_pushbuf *push = nvc0->base.pushbuf;
> + struct nouveau_bo *txc = nvc0->screen->txc;
> + const int s = 5;
> + unsigned i;
> + unsigned n = 0;
> + bool need_flush = false;
> +
> + for (i = 0; i < nvc0->num_textures[s]; ++i) {
> + struct nv50_tic_entry *tic = nv50_tic_entry(nvc0->textures[s][i]);
> + struct nv04_resource *res;
> + const bool dirty = !!(nvc0->textures_dirty[s] & (1 << i));
> +
> + if (!tic) {
> + if (dirty)
> + commands[n++] = (i << 1) | 0;
> + continue;
> + }
> + res = nv04_resource(tic->pipe.texture);
> + nvc0_update_tic(nvc0, tic, res);
> +
> + if (tic->id < 0) {
> + tic->id = nvc0_screen_tic_alloc(nvc0->screen, tic);
> +
> + PUSH_SPACE(push, 17);
> + BEGIN_NVC0(push, NVC0_M2MF(OFFSET_OUT_HIGH), 2);
> + PUSH_DATAh(push, txc->offset + (tic->id * 32));
> + PUSH_DATA (push, txc->offset + (tic->id * 32));
> + BEGIN_NVC0(push, NVC0_M2MF(LINE_LENGTH_IN), 2);
> + PUSH_DATA (push, 32);
> + PUSH_DATA (push, 1);
> + BEGIN_NVC0(push, NVC0_M2MF(EXEC), 1);
> + PUSH_DATA (push, 0x100111);
> + BEGIN_NIC0(push, NVC0_M2MF(DATA), 8);
> + PUSH_DATAp(push, &tic->tic[0], 8);
> +
> + need_flush = true;
> + } else
> + if (res->status & NOUVEAU_BUFFER_STATUS_GPU_WRITING) {
> + BEGIN_NVC0(push, NVC0_COMPUTE(TEX_CACHE_CTL), 1);
> + PUSH_DATA (push, (tic->id << 4) | 1);
> + NOUVEAU_DRV_STAT(&nvc0->screen->base, tex_cache_flush_count, 1);
> + }
> + nvc0->screen->tic.lock[tic->id / 32] |= 1 << (tic->id % 32);
> +
> + res->status &= ~NOUVEAU_BUFFER_STATUS_GPU_WRITING;
> + res->status |= NOUVEAU_BUFFER_STATUS_GPU_READING;
> +
> + if (!dirty)
> + continue;
> + commands[n++] = (tic->id << 9) | (i << 1) | 1;
> +
> + BCTX_REFN(nvc0->bufctx_cp, CP_TEX(i), res, RD);
> + }
> + for (; i < nvc0->state.num_textures[s]; ++i)
> + commands[n++] = (i << 1) | 0;
> +
> + nvc0->state.num_textures[s] = nvc0->num_textures[s];
> +
> + if (n) {
> + BEGIN_NIC0(push, NVC0_COMPUTE(BIND_TIC), n);
> + PUSH_DATAp(push, commands, n);
> + }
> + nvc0->textures_dirty[s] = 0;
> +
> + if (need_flush) {
> + BEGIN_NVC0(push, NVC0_COMPUTE(TIC_FLUSH), 1);
> + PUSH_DATA (push, 0);
> + }
> +}
> +
> +static void
> nvc0_compute_validate_constbufs(struct nvc0_context *nvc0)
> {
> struct nouveau_pushbuf *push = nvc0->base.pushbuf;
> @@ -233,12 +365,16 @@ nvc0_compute_state_validate(struct nvc0_context *nvc0)
> {
> if (!nvc0_compute_validate_program(nvc0))
> return false;
> + if (nvc0->dirty_cp & NVC0_NEW_CP_TEXTURES)
> + nvc0_compute_validate_textures(nvc0);
> + if (nvc0->dirty_cp & NVC0_NEW_CP_SAMPLERS)
> + nvc0_compute_validate_samplers(nvc0);
> if (nvc0->dirty_cp & NVC0_NEW_CP_CONSTBUF)
> nvc0_compute_validate_constbufs(nvc0);
> if (nvc0->dirty_cp & NVC0_NEW_CP_BUFFERS)
> nvc0_compute_validate_buffers(nvc0);
>
> - /* TODO: textures, samplers, surfaces, global memory buffers */
> + /* TODO: surfaces, global memory buffers */
>
> nvc0_bufctx_fence(nvc0, nvc0->bufctx_cp, false);
>
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
> index bcb53cc..6ea6ef8 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
> @@ -270,6 +270,8 @@ extern void nvc0_clear(struct pipe_context *, unsigned buffers,
> extern void nvc0_init_surface_functions(struct nvc0_context *);
>
> /* nvc0_tex.c */
> +void nvc0_update_tic(struct nvc0_context *, struct nv50_tic_entry *,
> + struct nv04_resource *);
> bool nve4_validate_tsc(struct nvc0_context *nvc0, int s);
> void nvc0_validate_textures(struct nvc0_context *);
> void nvc0_validate_samplers(struct nvc0_context *);
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
> index 24bbff6..3b8f8eb 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
> @@ -224,7 +224,7 @@ nvc0_create_texture_view(struct pipe_context *pipe,
> return &view->pipe;
> }
>
> -static void
> +void
> nvc0_update_tic(struct nvc0_context *nvc0, struct nv50_tic_entry *tic,
> struct nv04_resource *res)
> {
> --
> 2.6.4
>
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