[Mesa-dev] [PATCH 14/23] i965: Add means for limiting color resolves

Topi Pohjolainen topi.pohjolainen at intel.com
Mon Feb 8 16:51:34 UTC 2016


Until now there has been only one type of color buffer that needs
to resolved - namely single sampled fast clear. As even the
sampler engine in GPU doesn't understand the associated meta data,
the color values need to be always resolved prior to reading them.

>From SKL onwards there is new scheme supported called the lossless
compresson of single sampled color buffers. This is something that
is understood by the sampling engine and therefore resolving of
these types of buffers is not necessary before sampling.
This patch adds means to make the distinction when considering if
resolve is needed.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_blorp_blit.cpp   | 2 +-
 src/mesa/drivers/dri/i965/brw_context.c        | 8 ++++----
 src/mesa/drivers/dri/i965/intel_blit.c         | 4 ++--
 src/mesa/drivers/dri/i965/intel_copy_image.c   | 4 ++--
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c  | 9 ++++++---
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h  | 3 ++-
 src/mesa/drivers/dri/i965/intel_pixel_bitmap.c | 2 +-
 src/mesa/drivers/dri/i965/intel_pixel_read.c   | 2 +-
 src/mesa/drivers/dri/i965/intel_tex_image.c    | 2 +-
 src/mesa/drivers/dri/i965/intel_tex_subimage.c | 2 +-
 10 files changed, 21 insertions(+), 17 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index 9ca33b4..bc008ae 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -71,7 +71,7 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
     * to destination color buffers, and the standard render path is
     * fast-color-aware.
     */
-   intel_miptree_resolve_color(brw, src_mt);
+   intel_miptree_resolve_color(brw, src_mt, 0);
    intel_miptree_slice_resolve_depth(brw, src_mt, src_level, src_layer);
    intel_miptree_slice_resolve_depth(brw, dst_mt, dst_level, dst_layer);
 
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 44d2fe4..a5f7a2e 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -208,7 +208,7 @@ intel_update_state(struct gl_context * ctx, GLuint new_state)
       if (!tex_obj || !tex_obj->mt)
 	 continue;
       intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt);
-      intel_miptree_resolve_color(brw, tex_obj->mt);
+      intel_miptree_resolve_color(brw, tex_obj->mt, 0);
       brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
    }
 
@@ -223,7 +223,7 @@ intel_update_state(struct gl_context * ctx, GLuint new_state)
             tex_obj = intel_texture_object(u->TexObj);
 
             if (tex_obj && tex_obj->mt) {
-               intel_miptree_resolve_color(brw, tex_obj->mt);
+               intel_miptree_resolve_color(brw, tex_obj->mt, 0);
                brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
             }
          }
@@ -252,7 +252,7 @@ intel_update_state(struct gl_context * ctx, GLuint new_state)
              _mesa_get_srgb_format_linear(mt->format) == mt->format)
                continue;
 
-         intel_miptree_resolve_color(brw, mt);
+         intel_miptree_resolve_color(brw, mt, 0);
          brw_render_cache_set_check_flush(brw, mt->bo);
       }
    }
@@ -1227,7 +1227,7 @@ intel_resolve_for_dri2_flush(struct brw_context *brw,
       if (rb == NULL || rb->mt == NULL)
          continue;
       if (rb->mt->num_samples <= 1)
-         intel_miptree_resolve_color(brw, rb->mt);
+         intel_miptree_resolve_color(brw, rb->mt, 0);
       else
          intel_renderbuffer_downsample(brw, rb);
    }
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
index 6d29fbd..72cf9af 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -317,8 +317,8 @@ intel_miptree_blit(struct brw_context *brw,
     */
    intel_miptree_slice_resolve_depth(brw, src_mt, src_level, src_slice);
    intel_miptree_slice_resolve_depth(brw, dst_mt, dst_level, dst_slice);
-   intel_miptree_resolve_color(brw, src_mt);
-   intel_miptree_resolve_color(brw, dst_mt);
+   intel_miptree_resolve_color(brw, src_mt, 0);
+   intel_miptree_resolve_color(brw, dst_mt, 0);
 
    if (src_flip)
       src_y = minify(src_mt->physical_height0, src_level - src_mt->first_level) - src_y - height;
diff --git a/src/mesa/drivers/dri/i965/intel_copy_image.c b/src/mesa/drivers/dri/i965/intel_copy_image.c
index 0a3337e..fac4252 100644
--- a/src/mesa/drivers/dri/i965/intel_copy_image.c
+++ b/src/mesa/drivers/dri/i965/intel_copy_image.c
@@ -269,11 +269,11 @@ intel_copy_image_sub_data(struct gl_context *ctx,
     */
    intel_miptree_all_slices_resolve_hiz(brw, src_mt);
    intel_miptree_all_slices_resolve_depth(brw, src_mt);
-   intel_miptree_resolve_color(brw, src_mt);
+   intel_miptree_resolve_color(brw, src_mt, 0);
 
    intel_miptree_all_slices_resolve_hiz(brw, dst_mt);
    intel_miptree_all_slices_resolve_depth(brw, dst_mt);
-   intel_miptree_resolve_color(brw, dst_mt);
+   intel_miptree_resolve_color(brw, dst_mt, 0);
 
    if (copy_image_with_blitter(brw, src_mt, src_level,
                                src_x, src_y, src_z,
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 6ec02d8..5b176ca 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -2028,8 +2028,11 @@ intel_miptree_all_slices_resolve_depth(struct brw_context *brw,
 
 void
 intel_miptree_resolve_color(struct brw_context *brw,
-                            struct intel_mipmap_tree *mt)
+                            struct intel_mipmap_tree *mt,
+                            int flags)
 {
+   (void)flags;
+
    switch (mt->fast_clear_state) {
    case INTEL_FAST_CLEAR_STATE_NO_MCS:
    case INTEL_FAST_CLEAR_STATE_RESOLVED:
@@ -2068,7 +2071,7 @@ intel_miptree_make_shareable(struct brw_context *brw,
    assert(mt->msaa_layout == INTEL_MSAA_LAYOUT_NONE);
 
    if (mt->mcs_mt) {
-      intel_miptree_resolve_color(brw, mt);
+      intel_miptree_resolve_color(brw, mt, 0);
       intel_miptree_release(&mt->mcs_mt);
       mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_NO_MCS;
    }
@@ -2176,7 +2179,7 @@ intel_miptree_map_raw(struct brw_context *brw, struct intel_mipmap_tree *mt)
    /* CPU accesses to color buffers don't understand fast color clears, so
     * resolve any pending fast color clears before we map.
     */
-   intel_miptree_resolve_color(brw, mt);
+   intel_miptree_resolve_color(brw, mt, 0);
 
    drm_intel_bo *bo = mt->bo;
 
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index 0970fd5..819ec5a 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -895,7 +895,8 @@ intel_miptree_used_for_rendering(struct intel_mipmap_tree *mt)
 
 void
 intel_miptree_resolve_color(struct brw_context *brw,
-                            struct intel_mipmap_tree *mt);
+                            struct intel_mipmap_tree *mt,
+                            int flags);
 
 void
 intel_miptree_make_shareable(struct brw_context *brw,
diff --git a/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c b/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
index 699e48a..54a7413 100644
--- a/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
+++ b/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
@@ -257,7 +257,7 @@ do_blit_bitmap( struct gl_context *ctx,
    /* The blitter has no idea about fast color clears, so we need to resolve
     * the miptree before we do anything.
     */
-   intel_miptree_resolve_color(brw, irb->mt);
+   intel_miptree_resolve_color(brw, irb->mt, 0);
 
    /* Chop it all into chunks that can be digested by hardware: */
    for (py = 0; py < height; py += DY) {
diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/src/mesa/drivers/dri/i965/intel_pixel_read.c
index 10d1462..31030b1 100644
--- a/src/mesa/drivers/dri/i965/intel_pixel_read.c
+++ b/src/mesa/drivers/dri/i965/intel_pixel_read.c
@@ -155,7 +155,7 @@ intel_readpixels_tiled_memcpy(struct gl_context * ctx,
    /* Since we are going to read raw data to the miptree, we need to resolve
     * any pending fast color clears before we start.
     */
-   intel_miptree_resolve_color(brw, irb->mt);
+   intel_miptree_resolve_color(brw, irb->mt, 0);
 
    bo = irb->mt->bo;
 
diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c
index 5d32a4c..e21c3ac 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_image.c
@@ -423,7 +423,7 @@ intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx,
    /* Since we are going to write raw data to the miptree, we need to resolve
     * any pending fast color clears before we start.
     */
-   intel_miptree_resolve_color(brw, image->mt);
+   intel_miptree_resolve_color(brw, image->mt, 0);
 
    bo = image->mt->bo;
 
diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c b/src/mesa/drivers/dri/i965/intel_tex_subimage.c
index 970ded1..573f701 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_subimage.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_subimage.c
@@ -140,7 +140,7 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx,
    /* Since we are going to write raw data to the miptree, we need to resolve
     * any pending fast color clears before we start.
     */
-   intel_miptree_resolve_color(brw, image->mt);
+   intel_miptree_resolve_color(brw, image->mt, 0);
 
    bo = image->mt->bo;
 
-- 
2.5.0



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