[Mesa-dev] [PATCH 16/23] i965: Add a few assertions on lossless compression

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 4 ++++
 src/mesa/drivers/dri/i965/brw_context.c      | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index bc008ae..af3bb15 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -70,7 +70,11 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
     * the destination buffer because we use the standard render path to render
     * to destination color buffers, and the standard render path is
     * fast-color-aware.
+    * Lossless compression is only introduced for gen9 onwards whereas
+    * blorp is not supported even for gen8. Therefore it should be impossible
+    * to end up here with single sampled compressed surfaces.
     */
+   assert(src_mt->msaa_layout != INTEL_MSAA_LAYOUT_CSS);
    intel_miptree_resolve_color(brw, src_mt, 0);
    intel_miptree_slice_resolve_depth(brw, src_mt, src_level, src_layer);
    intel_miptree_slice_resolve_depth(brw, dst_mt, dst_level, dst_layer);
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index b61036e..c3d02bc 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -262,6 +262,10 @@ intel_update_state(struct gl_context * ctx, GLuint new_state)
              _mesa_get_srgb_format_linear(mt->format) == mt->format)
                continue;
 
+         /* Lossless compression is not supported for SRGB formats, it
+          * should be impossible to get here with such surfaces.
+          */
+         assert(mt->msaa_layout != INTEL_MSAA_LAYOUT_CSS);
          intel_miptree_resolve_color(brw, mt, 0);
          brw_render_cache_set_check_flush(brw, mt->bo);
       }
-- 
2.5.0