[Mesa-dev] [v2 11/19] i965: Add a flag telling color resolve pass to ignore CCS_E
Topi Pohjolainen
topi.pohjolainen at intel.com
Thu Feb 11 18:34:04 UTC 2016
v2 (Ben): Use combination of msaa_layout and number of samples
instead of introducing explicit type for lossless
compression (intel_miptree_is_lossless_compressed()).
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
src/mesa/drivers/dri/i965/brw_context.c | 12 +++++++++++-
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 8 +++++++-
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 9 +++++++++
3 files changed, 27 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index a5f7a2e..b61036e 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -208,7 +208,11 @@ intel_update_state(struct gl_context * ctx, GLuint new_state)
if (!tex_obj || !tex_obj->mt)
continue;
intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt);
- intel_miptree_resolve_color(brw, tex_obj->mt, 0);
+ /* Sampling engine understands lossless compression and resolving
+ * those surfaces should be skipped for performance reasons.
+ */
+ intel_miptree_resolve_color(brw, tex_obj->mt,
+ INTEL_MIPTREE_IGNORE_CCS_E);
brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
}
@@ -223,6 +227,12 @@ intel_update_state(struct gl_context * ctx, GLuint new_state)
tex_obj = intel_texture_object(u->TexObj);
if (tex_obj && tex_obj->mt) {
+ /* Access to images is implemented using indirect messages
+ * against data port. Normal render target write understands
+ * lossless compression but unfortunately the typed/untyped
+ * read/write interface doesn't. Therefore the compressed
+ * surfaces need to be resolved prior to accessing them.
+ */
intel_miptree_resolve_color(brw, tex_obj->mt, 0);
brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
}
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index dd1d8be..6c6fbef 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -2041,7 +2041,13 @@ intel_miptree_resolve_color(struct brw_context *brw,
struct intel_mipmap_tree *mt,
int flags)
{
- (void)flags;
+ /* From gen9 onwards there is new compression scheme for single sampled
+ * surfaces called "lossless compressed". These don't need to be always
+ * resolved.
+ */
+ if ((flags & INTEL_MIPTREE_IGNORE_CCS_E) &&
+ intel_miptree_is_lossless_compressed(brw, mt))
+ return;
switch (mt->fast_clear_state) {
case INTEL_FAST_CLEAR_STATE_NO_MCS:
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index 155e507..a21f33f 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -888,6 +888,15 @@ intel_miptree_used_for_rendering(struct intel_mipmap_tree *mt)
mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_UNRESOLVED;
}
+/**
+ * Flag values telling color resolve pass which special types of buffers
+ * can be ignored.
+ *
+ * INTEL_MIPTREE_IGNORE_CCS_E: Lossless compressed (single-sample
+ * compression scheme since gen9)
+ */
+#define INTEL_MIPTREE_IGNORE_CCS_E (1 << 0)
+
void
intel_miptree_resolve_color(struct brw_context *brw,
struct intel_mipmap_tree *mt,
--
2.5.0
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