[Mesa-dev] [PATCH 03/14] i965: Expose draw primitive formatting

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_draw.c | 82 ++++++++++++++++++++++--------------
 src/mesa/drivers/dri/i965/brw_draw.h |  7 +++
 2 files changed, 58 insertions(+), 31 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index c8a083c..210b819 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -179,10 +179,50 @@ trim(GLenum prim, GLuint length)
 }
 
 
-static void
+void
 brw_emit_prim(struct brw_context *brw,
               const struct _mesa_prim *prim,
-              uint32_t hw_prim)
+              uint32_t hw_prim,
+              int start_vertex_location,
+              int base_vertex_location,
+              int verts_per_instance,
+              int predicate_enable)
+{
+   BEGIN_BATCH(brw->gen >= 7 ? 7 : 6);
+
+   if (brw->gen >= 7) {
+      const int indirect_flag = 
+         prim->is_indirect ? GEN7_3DPRIM_INDIRECT_PARAMETER_ENABLE : 0;
+      const int vertex_access_type = prim->indexed ?
+         GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM :
+         GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL;
+
+      OUT_BATCH(CMD_3D_PRIM << 16 | (7 - 2) |
+                indirect_flag |
+                predicate_enable);
+      OUT_BATCH(hw_prim | vertex_access_type);
+   } else {
+      const int vertex_access_type = prim->indexed ?
+         GEN4_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM :
+         GEN4_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL;
+
+      OUT_BATCH(CMD_3D_PRIM << 16 | (6 - 2) |
+                hw_prim << GEN4_3DPRIM_TOPOLOGY_TYPE_SHIFT |
+                vertex_access_type);
+   }
+   OUT_BATCH(verts_per_instance);
+   OUT_BATCH(start_vertex_location);
+   OUT_BATCH(prim->num_instances);
+   OUT_BATCH(prim->base_instance);
+   OUT_BATCH(base_vertex_location);
+   ADVANCE_BATCH();
+}
+
+
+static void
+emit_prim(struct brw_context *brw,
+          const struct _mesa_prim *prim,
+          uint32_t hw_prim)
 {
    int verts_per_instance;
 
@@ -253,34 +293,14 @@ brw_emit_prim(struct brw_context *brw,
       }
    }
 
-   BEGIN_BATCH(brw->gen >= 7 ? 7 : 6);
-
-   if (brw->gen >= 7) {
-      const int predicate_enable =
-         (brw->predicate.state == BRW_PREDICATE_STATE_USE_BIT)
-         ? GEN7_3DPRIM_PREDICATE_ENABLE : 0;
-      const int indirect_flag = 
-         prim->is_indirect ? GEN7_3DPRIM_INDIRECT_PARAMETER_ENABLE : 0;
-      const int vertex_access_type = prim->indexed ?
-         GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM :
-         GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL;
-
-      OUT_BATCH(CMD_3D_PRIM << 16 | (7 - 2) | indirect_flag | predicate_enable);
-      OUT_BATCH(hw_prim | vertex_access_type);
-   } else {
-      const int vertex_access_type = prim->indexed ?
-         GEN4_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM :
-         GEN4_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL;
-      OUT_BATCH(CMD_3D_PRIM << 16 | (6 - 2) |
-                hw_prim << GEN4_3DPRIM_TOPOLOGY_TYPE_SHIFT |
-                vertex_access_type);
-   }
-   OUT_BATCH(verts_per_instance);
-   OUT_BATCH(start_vertex_location);
-   OUT_BATCH(prim->num_instances);
-   OUT_BATCH(prim->base_instance);
-   OUT_BATCH(base_vertex_location);
-   ADVANCE_BATCH();
+   const int predicate_enable =
+      (brw->gen >= 7 && brw->predicate.state == BRW_PREDICATE_STATE_USE_BIT) ?
+      GEN7_3DPRIM_PREDICATE_ENABLE : 0;
+   brw_emit_prim(brw, prim, hw_prim,
+                 start_vertex_location,
+                 base_vertex_location,
+                 verts_per_instance,
+                 predicate_enable);
 
    if (brw->always_flush_cache)
       brw_emit_mi_flush(brw);
@@ -556,7 +576,7 @@ retry:
 	 brw_upload_render_state(brw);
       }
 
-      brw_emit_prim(brw, &prims[i], brw->primitive);
+      emit_prim(brw, &prims[i], brw->primitive);
 
       brw->no_batch_wrap = false;
 
diff --git a/src/mesa/drivers/dri/i965/brw_draw.h b/src/mesa/drivers/dri/i965/brw_draw.h
index 23d98ef..56445d1 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.h
+++ b/src/mesa/drivers/dri/i965/brw_draw.h
@@ -30,6 +30,13 @@
 
 struct brw_context;
 
+void brw_emit_prim(struct brw_context *brw,
+                   const struct _mesa_prim *prim,
+                   uint32_t hw_prim,
+                   int start_vertex_location,
+                   int base_vertex_location,
+                   int verts_per_instance,
+                   int predicate_enable);
 
 void brw_draw_prims(struct gl_context *ctx,
 		     const struct _mesa_prim *prims,
-- 
2.5.0