[Mesa-dev] [PATCH 06/14] i965/blorp: Move vertex buffer setup to meta util
Topi Pohjolainen
topi.pohjolainen at intel.com
Thu Feb 25 09:46:11 UTC 2016
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
src/mesa/drivers/dri/i965/brw_meta_util.c | 32 +++++++++++++++++++++++++
src/mesa/drivers/dri/i965/brw_meta_util.h | 5 ++++
src/mesa/drivers/dri/i965/gen6_blorp.cpp | 39 ++++---------------------------
3 files changed, 41 insertions(+), 35 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_meta_util.c b/src/mesa/drivers/dri/i965/brw_meta_util.c
index 6c4b3cb..8c0b642 100644
--- a/src/mesa/drivers/dri/i965/brw_meta_util.c
+++ b/src/mesa/drivers/dri/i965/brw_meta_util.c
@@ -224,3 +224,35 @@ brw_meta_end(struct brw_context *brw)
return true;
}
+
+void
+brw_meta_emit_vertex_buffer_state(struct brw_context *brw,
+ unsigned num_elems,
+ unsigned vbo_size,
+ uint32_t vertex_offset)
+{
+ /* 3DSTATE_VERTEX_BUFFERS */
+ const int num_buffers = 1;
+ const int batch_length = 1 + 4 * num_buffers;
+
+ uint32_t dw0 = GEN6_VB0_ACCESS_VERTEXDATA |
+ (num_elems * sizeof(float)) << BRW_VB0_PITCH_SHIFT;
+
+ if (brw->gen >= 7)
+ dw0 |= GEN7_VB0_ADDRESS_MODIFYENABLE;
+
+ if (brw->gen == 7)
+ dw0 |= GEN7_MOCS_L3 << 16;
+
+ BEGIN_BATCH(batch_length);
+ OUT_BATCH((_3DSTATE_VERTEX_BUFFERS << 16) | (batch_length - 2));
+ OUT_BATCH(dw0);
+ /* start address */
+ OUT_RELOC(brw->batch.bo, I915_GEM_DOMAIN_VERTEX, 0,
+ vertex_offset);
+ /* end address */
+ OUT_RELOC(brw->batch.bo, I915_GEM_DOMAIN_VERTEX, 0,
+ vertex_offset + vbo_size - 1);
+ OUT_BATCH(0);
+ ADVANCE_BATCH();
+}
diff --git a/src/mesa/drivers/dri/i965/brw_meta_util.h b/src/mesa/drivers/dri/i965/brw_meta_util.h
index 13dbf15..2cc63ee 100644
--- a/src/mesa/drivers/dri/i965/brw_meta_util.h
+++ b/src/mesa/drivers/dri/i965/brw_meta_util.h
@@ -51,6 +51,11 @@ brw_meta_end(struct brw_context *brw);
void brw_meta_draw_rect(struct brw_context *brw, int num_instances);
+void brw_meta_emit_vertex_buffer_state(struct brw_context *brw,
+ unsigned num_elems,
+ unsigned vbo_size,
+ uint32_t vertex_offset);
+
#ifdef __cplusplus
}
#endif
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
index e28e6db..0f5a952 100644
--- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
@@ -30,6 +30,7 @@
#include "brw_state.h"
#include "brw_blorp.h"
+#include "brw_meta_util.h"
/**
* \name Constants for BLORP VBO
@@ -90,38 +91,6 @@ gen6_blorp_emit_state_base_address(struct brw_context *brw,
ADVANCE_BATCH();
}
-static void
-gen6_blorp_emit_vertex_buffer_state(struct brw_context *brw,
- unsigned num_elems,
- unsigned vbo_size,
- uint32_t vertex_offset)
-{
- /* 3DSTATE_VERTEX_BUFFERS */
- const int num_buffers = 1;
- const int batch_length = 1 + 4 * num_buffers;
-
- uint32_t dw0 = GEN6_VB0_ACCESS_VERTEXDATA |
- (num_elems * sizeof(float)) << BRW_VB0_PITCH_SHIFT;
-
- if (brw->gen >= 7)
- dw0 |= GEN7_VB0_ADDRESS_MODIFYENABLE;
-
- if (brw->gen == 7)
- dw0 |= GEN7_MOCS_L3 << 16;
-
- BEGIN_BATCH(batch_length);
- OUT_BATCH((_3DSTATE_VERTEX_BUFFERS << 16) | (batch_length - 2));
- OUT_BATCH(dw0);
- /* start address */
- OUT_RELOC(brw->batch.bo, I915_GEM_DOMAIN_VERTEX, 0,
- vertex_offset);
- /* end address */
- OUT_RELOC(brw->batch.bo, I915_GEM_DOMAIN_VERTEX, 0,
- vertex_offset + vbo_size - 1);
- OUT_BATCH(0);
- ADVANCE_BATCH();
-}
-
void
gen6_blorp_emit_vertices(struct brw_context *brw,
const brw_blorp_params *params)
@@ -172,9 +141,9 @@ gen6_blorp_emit_vertices(struct brw_context *brw,
memcpy(vertex_data, vertices, GEN6_BLORP_VBO_SIZE);
}
- gen6_blorp_emit_vertex_buffer_state(brw, GEN6_BLORP_NUM_VUE_ELEMS,
- GEN6_BLORP_VBO_SIZE,
- vertex_offset);
+ brw_meta_emit_vertex_buffer_state(brw, GEN6_BLORP_NUM_VUE_ELEMS,
+ GEN6_BLORP_VBO_SIZE,
+ vertex_offset);
/* 3DSTATE_VERTEX_ELEMENTS
*
--
2.5.0
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