[Mesa-dev] [PATCH 1/5] i965: Pass symbolic swizzle to brw_swizzle() as a single argument.
Iago Toral
itoral at igalia.com
Mon Feb 29 14:48:28 UTC 2016
Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>
On Fri, 2016-02-26 at 22:02 -0800, Francisco Jerez wrote:
> And replace brw_swizzle1() with brw_swizzle(). Seems slightly cleaner
> and will allow reusing brw_swizzle() in the vec4 back-end more easily.
> ---
> src/mesa/drivers/dri/i965/brw_clip_unfilled.c | 6 ++++--
> src/mesa/drivers/dri/i965/brw_clip_util.c | 13 +++++++------
> src/mesa/drivers/dri/i965/brw_eu_emit.c | 2 +-
> src/mesa/drivers/dri/i965/brw_reg.h | 15 ++++-----------
> 4 files changed, 16 insertions(+), 20 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
> index 3c18858..d333d10 100644
> --- a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
> +++ b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
> @@ -85,8 +85,10 @@ static void compute_tri_direction( struct brw_clip_compile *c )
> /* Take their crossproduct:
> */
> brw_set_default_access_mode(p, BRW_ALIGN_16);
> - brw_MUL(p, vec4(brw_null_reg()), brw_swizzle(e, 1,2,0,3), brw_swizzle(f,2,0,1,3));
> - brw_MAC(p, vec4(e), negate(brw_swizzle(e, 2,0,1,3)), brw_swizzle(f,1,2,0,3));
> + brw_MUL(p, vec4(brw_null_reg()), brw_swizzle(e, BRW_SWIZZLE_YZXW),
> + brw_swizzle(f, BRW_SWIZZLE_ZXYW));
> + brw_MAC(p, vec4(e), negate(brw_swizzle(e, BRW_SWIZZLE_ZXYW)),
> + brw_swizzle(f, BRW_SWIZZLE_YZXW));
> brw_set_default_access_mode(p, BRW_ALIGN_1);
>
> brw_MUL(p, c->reg.dir, c->reg.dir, vec4(e));
> diff --git a/src/mesa/drivers/dri/i965/brw_clip_util.c b/src/mesa/drivers/dri/i965/brw_clip_util.c
> index 7ef3305..3e6664e 100644
> --- a/src/mesa/drivers/dri/i965/brw_clip_util.c
> +++ b/src/mesa/drivers/dri/i965/brw_clip_util.c
> @@ -98,7 +98,8 @@ void brw_clip_project_position(struct brw_clip_compile *c, struct brw_reg pos )
> /* value.xyz *= value.rhw
> */
> brw_set_default_access_mode(p, BRW_ALIGN_16);
> - brw_MUL(p, brw_writemask(pos, WRITEMASK_XYZ), pos, brw_swizzle1(pos, W));
> + brw_MUL(p, brw_writemask(pos, WRITEMASK_XYZ), pos,
> + brw_swizzle(pos, BRW_SWIZZLE_WWWW));
> brw_set_default_access_mode(p, BRW_ALIGN_1);
> }
>
> @@ -194,11 +195,11 @@ void brw_clip_interp_vertex( struct brw_clip_compile *c,
> brw_set_default_access_mode(p, BRW_ALIGN_16);
> brw_MOV(p,
> brw_writemask(t_nopersp, WRITEMASK_ZW),
> - brw_swizzle(tmp, 0, 1, 0, 1));
> + brw_swizzle(tmp, BRW_SWIZZLE_XYXY));
>
> /* t_nopersp = vec4(v1.xy, dest.xy) - v0.xyxy */
> brw_ADD(p, t_nopersp, t_nopersp,
> - negate(brw_swizzle(v0_ndc_copy, 0, 1, 0, 1)));
> + negate(brw_swizzle(v0_ndc_copy, BRW_SWIZZLE_XYXY)));
>
> /* Add the absolute values of the X and Y deltas so that if
> * the points aren't in the same place on the screen we get
> @@ -212,8 +213,8 @@ void brw_clip_interp_vertex( struct brw_clip_compile *c,
> */
> brw_ADD(p,
> brw_writemask(t_nopersp, WRITEMASK_XY),
> - brw_abs(brw_swizzle(t_nopersp, 0, 2, 0, 0)),
> - brw_abs(brw_swizzle(t_nopersp, 1, 3, 0, 0)));
> + brw_abs(brw_swizzle(t_nopersp, BRW_SWIZZLE_XZXZ)),
> + brw_abs(brw_swizzle(t_nopersp, BRW_SWIZZLE_YWYW)));
> brw_set_default_access_mode(p, BRW_ALIGN_1);
>
> /* If the points are in the same place, just substitute a
> @@ -234,7 +235,7 @@ void brw_clip_interp_vertex( struct brw_clip_compile *c,
> brw_MUL(p, vec1(t_nopersp), vec1(t_nopersp),
> vec1(suboffset(t_nopersp, 1)));
> brw_set_default_access_mode(p, BRW_ALIGN_16);
> - brw_MOV(p, t_nopersp, brw_swizzle(t_nopersp, 0, 0, 0, 0));
> + brw_MOV(p, t_nopersp, brw_swizzle(t_nopersp, BRW_SWIZZLE_XXXX));
> brw_set_default_access_mode(p, BRW_ALIGN_1);
>
> release_tmp(c, tmp);
> diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
> index 35d8039..2e4d7be 100644
> --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
> +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
> @@ -3399,7 +3399,7 @@ brw_broadcast(struct brw_codegen *p,
> */
> inst = brw_MOV(p,
> brw_null_reg(),
> - stride(brw_swizzle1(idx, 0), 0, 4, 1));
> + stride(brw_swizzle(idx, BRW_SWIZZLE_XXXX), 0, 4, 1));
> brw_inst_set_pred_control(devinfo, inst, BRW_PREDICATE_NONE);
> brw_inst_set_cond_modifier(devinfo, inst, BRW_CONDITIONAL_NZ);
> brw_inst_set_flag_reg_nr(devinfo, inst, 1);
> diff --git a/src/mesa/drivers/dri/i965/brw_reg.h b/src/mesa/drivers/dri/i965/brw_reg.h
> index a2a4a40..a4bcfca 100644
> --- a/src/mesa/drivers/dri/i965/brw_reg.h
> +++ b/src/mesa/drivers/dri/i965/brw_reg.h
> @@ -81,7 +81,9 @@ struct brw_device_info;
> #define BRW_SWIZZLE_ZZZZ BRW_SWIZZLE4(2,2,2,2)
> #define BRW_SWIZZLE_WWWW BRW_SWIZZLE4(3,3,3,3)
> #define BRW_SWIZZLE_XYXY BRW_SWIZZLE4(0,1,0,1)
> +#define BRW_SWIZZLE_XZXZ BRW_SWIZZLE4(0,2,0,2)
> #define BRW_SWIZZLE_YZXW BRW_SWIZZLE4(1,2,0,3)
> +#define BRW_SWIZZLE_YWYW BRW_SWIZZLE4(1,3,1,3)
> #define BRW_SWIZZLE_ZXYW BRW_SWIZZLE4(2,0,1,3)
> #define BRW_SWIZZLE_ZWZW BRW_SWIZZLE4(2,3,2,3)
> #define BRW_SWIZZLE_WZYX BRW_SWIZZLE4(3,2,1,0)
> @@ -871,24 +873,15 @@ get_element_d(struct brw_reg reg, unsigned elt)
> return vec1(suboffset(retype(reg, BRW_REGISTER_TYPE_D), elt));
> }
>
> -
> static inline struct brw_reg
> -brw_swizzle(struct brw_reg reg, unsigned x, unsigned y, unsigned z, unsigned w)
> +brw_swizzle(struct brw_reg reg, unsigned swz)
> {
> assert(reg.file != BRW_IMMEDIATE_VALUE);
>
> - reg.swizzle = brw_compose_swizzle(BRW_SWIZZLE4(x, y, z, w),
> - reg.swizzle);
> + reg.swizzle = brw_compose_swizzle(swz, reg.swizzle);
> return reg;
> }
>
> -
> -static inline struct brw_reg
> -brw_swizzle1(struct brw_reg reg, unsigned x)
> -{
> - return brw_swizzle(reg, x, x, x, x);
> -}
> -
> static inline struct brw_reg
> brw_writemask(struct brw_reg reg, unsigned mask)
> {
More information about the mesa-dev
mailing list