[Mesa-dev] [PATCH 00/14] gallium/radeon: flushed depth textures for radeonsi

Nicolai Hähnle nhaehnle at gmail.com
Fri Jul 1 14:25:21 UTC 2016


this series is motivated by a rare stencil texturing bug. The bug is that
a combined Z/S buffer (with separate stencil) must use the same pitch for
both Z and S when accessed by the DB hardware block, but in some
configurations, the S part wants a larger pitch because its alignment
requirements (in pixels) are higher.

This series fixes the issue by flushing the stencil part to a separate
texture when needed.

Note that we actually have a choice of how to fix it. Alternatively, one
could tell addrlib to take the stencil part into account when computing the
Z layout, by setting noStencil = 0. Then Z and S always have the same pitch,
but the downside is that if Z has mipmaps, it makes the Z layout
incompatible with texture sampling, so then the Z part would have to be

Based on the assumption that depth texturing is more frequent than stencil
texturing, I chose the first option. In any case, we only ever need a flushed
texture when mipmapping is used.

Tested on Redwood, Verde, Tonga, Polaris. Please review!

 src/gallium/drivers/r600/evergreen_state.c   |  12 +-
 src/gallium/drivers/r600/r600_blit.c         |  10 +-
 src/gallium/drivers/r600/r600_pipe.h         |   8 -
 src/gallium/drivers/r600/r600_state.c        |  24 +-
 src/gallium/drivers/r600/r600_state_common.c |   2 +-
 .../drivers/radeon/r600_pipe_common.h        |  11 +-
 src/gallium/drivers/radeon/r600_texture.c    |  65 ++++-
 src/gallium/drivers/radeon/radeon_winsys.h   |   9 +-
 src/gallium/drivers/radeonsi/si_blit.c       | 235 ++++++++++++-----
 .../drivers/radeonsi/si_descriptors.c        |  39 ++-
 src/gallium/drivers/radeonsi/si_state.c      |  25 +-
 .../winsys/amdgpu/drm/amdgpu_surface.c       |  17 +-
 .../winsys/radeon/drm/radeon_drm_surface.c   |   2 -
 13 files changed, 324 insertions(+), 135 deletions(-)

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