[Mesa-dev] [PATCH v4 21/34] i965/state: Use ISL for emitting image surfaces
Chad Versace
chad.versace at intel.com
Thu Jul 14 22:46:53 UTC 2016
On Thu 14 Jul 2016, Jason Ekstrand wrote:
> On Thu, Jul 14, 2016 at 3:10 PM, Chad Versace <chad.versace at intel.com>
> wrote:
>
> > On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > > ---
> > > src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 32
> > ++++++++++++++++--------
> > > 1 file changed, 21 insertions(+), 11 deletions(-)
> > > - brw->vtbl.emit_texture_surface_state(
> > > - brw, mt, target,
> > > - min_layer, min_layer + num_layers,
> > > - min_level, min_level + 1,
> > > - format, SWIZZLE_XYZW,
> > > - surf_offset, surf_index, access != GL_READ_ONLY, false);
> > > + brw_emit_surface_state(brw, mt, &view,
> > > +
> > surface_state_infos[brw->gen].rb_mocs, false,
> > > + surf_offset, surf_index,
> > > + I915_GEM_DOMAIN_SAMPLER,
> > > + I915_GEM_DOMAIN_SAMPLER);
> > > }
> >
> > I have concerns about the gem write domain. If I read
> > gen8_update_texture_surface() correctly, then pre-patch the last
> > argument to brw_emit_surface_state() was effectively
> > access == GL_READ_ONLY ? 0 : I915_GEM_DOMAIN_SAMPLER
> > I don't want to change the gem write domain without justification.
> >
>
> I talked to Curro about this briefly. Doing what you say above is probably
> best.
Great. With that change, this patch is
Reviewed-by: Chad Versace <chad.versace at intel.com>
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