[Mesa-dev] [PATCH v4 29/34] i965/gen4-6: Use the generic ISL-based path for texture surfaces
Alejandro Piñeiro
apinheiro at igalia.com
Sat Jul 16 21:14:35 UTC 2016
On 16/07/16 16:29, Jason Ekstrand wrote:
>
> On Jul 16, 2016 3:59 AM, "Alejandro Piñeiro" <apinheiro at igalia.com
> <mailto:apinheiro at igalia.com>> wrote:
> >
> > Don't know if there are still some missing patches to be submitted to
> > master, but this patch caused regressions on skylake on the following
> > CTS tests:
> >
> > *
> >
> GL44-CTS.texture_cube_map_array.image_texture_size.texture_size_compute_sh
> > *
> >
> GL44-CTS.texture_cube_map_array.image_texture_size.texture_size_fragment_sh
> > *
> >
> GL44-CTS.texture_cube_map_array.image_texture_size.texture_size_geometry_sh
> > *
> >
> GL44-CTS.texture_cube_map_array.image_texture_size.texture_size_tesselation_con_sh
> > *
> >
> GL44-CTS.texture_cube_map_array.image_texture_size.texture_size_tesselation_ev_sh
> > *
> >
> GL44-CTS.texture_cube_map_array.image_texture_size.texture_size_vertex_sh
>
> Thanks, I'll take a look on Monday. If textureSize is returning the
> wrong thing, do you know what it is returning?
>
The error messages for all the cases are like this:
textureSize() for samplerCubeArray returned wrong values of
[width][height][layers]. They are equal to[32][32][0] but should be
[32][32][3].
textureSize() for samplerCubeArrayShadow returned wrong values of
[width][height][layers]. They are equal to[32][32][0] but should be
[32][32][3].
textureSize() for samplerCubeArray returned wrong values of
[width][height][layers]. They are equal to[64][64][0] but should be
[64][64][1]
textureSize() for samplerCubeArrayShadow returned wrong values of
[width][height][layers]. They are equal to[64][64][0] but should be
[64][64][1].
textureSize() for samplerCubeArray returned wrong values of
[width][height][layers]. They are equal to[128][128][0] but should be
[128][128][2].
textureSize() for samplerCubeArrayShadow returned wrong values of
[width][height][layers]. They are equal to[128][128][0] but should be
[128][128][2].
textureSize() for samplerCubeArray returned wrong values of
[width][height][layers]. They are equal to[256][256][0] but should be
[256][256][2]
textureSize() for samplerCubeArrayShadow returned wrong values of
[width][height][layers]. They are equal to[256][256][0] but should be
[256][256][2].
So the regression seems to be related with layers.
> Also, are you sure it's this patch and not the similarly titled one
> for gen8?
>
Yes, you are right, I replied the wrong email. So in order to be clear,
when I did git-bisect this is the commit I found:
commit 7e951cd56228a726397d59286bf97287df36dc27
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Jun 6 20:31:38 2016 -0700
i965/gen8: Use the generic ISL-based path for texture surfaces
Signed-off-by: Jason Ekstrand <jason at jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Chad Versace <chad.versace at intel.com>
Sorry for the noise.
> When I go to reproduce this, will I need a special branch of the CTS?
>
Nothing really special. I used gl45 tarball with some minor local
changes that are related to help it to properly built, not on the tests
themselves.
BR
>
> --Jason
>
> > On 14/07/16 02:16, Jason Ekstrand wrote:
> > > Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com
> <mailto:topi.pohjolainen at intel.com>>
> > > ---
> > > src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 94
> +-----------------------
> > > 1 file changed, 1 insertion(+), 93 deletions(-)
> > >
> > > diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> > > index 084bd8c..01c9802 100644
> > > --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> > > +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> > > @@ -550,98 +550,6 @@ brw_update_buffer_texture_surface(struct
> gl_context *ctx,
> > > false /* rw */);
> > > }
> > >
> > > -static void
> > > -gen4_update_texture_surface(struct gl_context *ctx,
> > > - unsigned unit,
> > > - uint32_t *surf_offset,
> > > - bool for_gather,
> > > - uint32_t plane)
> > > -{
> > > - struct brw_context *brw = brw_context(ctx);
> > > - struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
> > > - struct intel_texture_object *intelObj =
> intel_texture_object(tObj);
> > > - struct intel_mipmap_tree *mt = intelObj->mt;
> > > - struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx,
> unit);
> > > - uint32_t *surf;
> > > -
> > > - /* BRW_NEW_TEXTURE_BUFFER */
> > > - if (tObj->Target == GL_TEXTURE_BUFFER) {
> > > - brw_update_buffer_texture_surface(ctx, unit, surf_offset);
> > > - return;
> > > - }
> > > -
> > > - if (plane > 0) {
> > > - if (mt->plane[plane - 1] == NULL)
> > > - return;
> > > - mt = mt->plane[plane - 1];
> > > - }
> > > -
> > > - surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
> > > - 6 * 4, 32, surf_offset);
> > > -
> > > - mesa_format mesa_fmt = plane == 0 ? intelObj->_Format :
> mt->format;
> > > - uint32_t tex_format = translate_tex_format(brw, mesa_fmt,
> > > - sampler->sRGBDecode);
> > > -
> > > - if (for_gather) {
> > > - /* Sandybridge's gather4 message is broken for integer formats.
> > > - * To work around this, we pretend the surface is UNORM for
> > > - * 8 or 16-bit formats, and emit shader instructions to recover
> > > - * the real INT/UINT value. For 32-bit formats, we pretend
> > > - * the surface is FLOAT, and simply reinterpret the resulting
> > > - * bits.
> > > - */
> > > - switch (tex_format) {
> > > - case BRW_SURFACEFORMAT_R8_SINT:
> > > - case BRW_SURFACEFORMAT_R8_UINT:
> > > - tex_format = BRW_SURFACEFORMAT_R8_UNORM;
> > > - break;
> > > -
> > > - case BRW_SURFACEFORMAT_R16_SINT:
> > > - case BRW_SURFACEFORMAT_R16_UINT:
> > > - tex_format = BRW_SURFACEFORMAT_R16_UNORM;
> > > - break;
> > > -
> > > - case BRW_SURFACEFORMAT_R32_SINT:
> > > - case BRW_SURFACEFORMAT_R32_UINT:
> > > - tex_format = BRW_SURFACEFORMAT_R32_FLOAT;
> > > - break;
> > > -
> > > - default:
> > > - break;
> > > - }
> > > - }
> > > -
> > > - surf[0] = (translate_tex_target(tObj->Target) <<
> BRW_SURFACE_TYPE_SHIFT |
> > > - BRW_SURFACE_MIPMAPLAYOUT_BELOW <<
> BRW_SURFACE_MIPLAYOUT_SHIFT |
> > > - BRW_SURFACE_CUBEFACE_ENABLES |
> > > - tex_format << BRW_SURFACE_FORMAT_SHIFT);
> > > -
> > > - surf[1] = mt->bo->offset64 + mt->offset; /* reloc */
> > > -
> > > - surf[2] = ((intelObj->_MaxLevel - tObj->BaseLevel) <<
> BRW_SURFACE_LOD_SHIFT |
> > > - (mt->logical_width0 - 1) << BRW_SURFACE_WIDTH_SHIFT |
> > > - (mt->logical_height0 - 1) << BRW_SURFACE_HEIGHT_SHIFT);
> > > -
> > > - surf[3] = (brw_get_surface_tiling_bits(mt->tiling) |
> > > - (mt->logical_depth0 - 1) << BRW_SURFACE_DEPTH_SHIFT |
> > > - (mt->pitch - 1) << BRW_SURFACE_PITCH_SHIFT);
> > > -
> > > - const unsigned min_lod = tObj->MinLevel + tObj->BaseLevel -
> mt->first_level;
> > > - surf[4] = (brw_get_surface_num_multisamples(mt->num_samples) |
> > > - SET_FIELD(min_lod, BRW_SURFACE_MIN_LOD) |
> > > - SET_FIELD(tObj->MinLayer,
> BRW_SURFACE_MIN_ARRAY_ELEMENT));
> > > -
> > > - surf[5] = mt->valign == 4 ? BRW_SURFACE_VERTICAL_ALIGN_ENABLE : 0;
> > > -
> > > - /* Emit relocation to surface contents */
> > > - drm_intel_bo_emit_reloc(brw->batch.bo <http://batch.bo>,
> > > - *surf_offset + 4,
> > > - mt->bo,
> > > - surf[1] - mt->bo->offset64,
> > > - I915_GEM_DOMAIN_SAMPLER, 0);
> > > -}
> > > -
> > > /**
> > > * Create the constant buffer surface. Vertex/fragment shader
> constants will be
> > > * read from this buffer with Data Port Read instructions/messages.
> > > @@ -1678,7 +1586,7 @@ const struct brw_tracked_state
> brw_wm_image_surfaces = {
> > > void
> > > gen4_init_vtable_surface_functions(struct brw_context *brw)
> > > {
> > > - brw->vtbl.update_texture_surface = gen4_update_texture_surface;
> > > + brw->vtbl.update_texture_surface = brw_update_texture_surface;
> > > brw->vtbl.update_renderbuffer_surface =
> gen4_update_renderbuffer_surface;
> > > brw->vtbl.emit_null_surface_state = brw_emit_null_surface_state;
> > > brw->vtbl.emit_buffer_surface_state =
> gen4_emit_buffer_surface_state;
> >
> > _______________________________________________
> > mesa-dev mailing list
> > mesa-dev at lists.freedesktop.org <mailto:mesa-dev at lists.freedesktop.org>
> > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <https://lists.freedesktop.org/archives/mesa-dev/attachments/20160716/30d038b2/attachment-0001.html>
More information about the mesa-dev
mailing list