[Mesa-dev] [PATCH 72/95] i965/vec4: Do not use DepCtrl with 64-bit instructions

[Iago Toral Quiroga]

The BDW PRM says that it is not supported, but it seems that gen7 is also
affected, since doing DepCtrl on double-float instructions leads to
GPU hangs in some cases, which is probably not surprising knowing that
this is not supported in new hardware iterations. The SKL PRMs do not
mention this restriction, so it is probably fine.
---
 src/mesa/drivers/dri/i965/brw_vec4.cpp | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index b4a22d1..1332d96 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -901,12 +901,16 @@ vec4_visitor::is_dep_ctrl_unsafe(const vec4_instruction *inst)
    (reg.type == BRW_REGISTER_TYPE_UD || \
     reg.type == BRW_REGISTER_TYPE_D)
 
+#define IS_64BIT(reg) (reg.file != BAD_FILE && type_sz(reg.type) == 8)
+
    /* From the Cherryview and Broadwell PRMs:
     *
     * "When source or destination datatype is 64b or operation is integer DWord
     * multiply, DepCtrl must not be used."
     *
-    * SKL PRMs don't include this restriction though.
+    * SKL PRMs don't include this restriction, however, gen7 seems to be
+    * affected, at least by the 64b restriction, since DepCtrl with double
+    * precision instructions seems to produce GPU hangs in some cases.
     */
    if (devinfo->gen == 8) {
       if (inst->opcode == BRW_OPCODE_MUL &&
@@ -914,6 +918,14 @@ vec4_visitor::is_dep_ctrl_unsafe(const vec4_instruction *inst)
          IS_DWORD(inst->src[1]))
          return true;
    }
+
+   if (devinfo->gen >= 7 && devinfo->gen <= 8) {
+      if (IS_64BIT(inst->dst) || IS_64BIT(inst->src[0]) ||
+          IS_64BIT(inst->src[1]) || IS_64BIT(inst->src[2]))
+      return true;
+   }
+
+#undef IS_64BIT
 #undef IS_DWORD
 
    if (devinfo->gen >= 8) {
-- 
2.7.4