[Mesa-dev] [PATCH 89/95] i965/vec4: fix writes to Z/W:DF from a FIXED_GRF

[Iago Toral Quiroga]

These can happen, for example, in tessellation evaluation when it maps
incoming attributes to FIXED_GRF registers. In this case, just as with
VGRFs, we need to make sure we have vstride=0 for these to work.
---
 src/mesa/drivers/dri/i965/brw_vec4.cpp | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index 7ea94cd..f92abe3 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -2328,9 +2328,8 @@ vec4_visitor::expand_64bit_swizzle_to_32bit()
             if ((inst->dst.writemask & WRITEMASK_ZW) &&
                 (inst->src[arg].swizzle == BRW_SWIZZLE_XXXX ||
                  inst->src[arg].swizzle == BRW_SWIZZLE_YYYY) &&
-                 inst->src[arg].file == VGRF) {
+                 inst->src[arg].file != UNIFORM)
                inst->src[arg].force_vstride0 = true;
-            }
          }
 
          /* Any DF source with a subnr > 0 is intended to address the second
-- 
2.7.4