[Mesa-dev] [PATCH 53/95] i965/disasm: fix subreg for dst in Align16 mode

[Iago Toral Quiroga]

There is a single bit for this, so it is a binary 0 or 1 meaning
offset 0B or 16B respectively.
---
 src/mesa/drivers/dri/i965/brw_disasm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c
index d5e9916..f4f41de 100644
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/i965/brw_disasm.c
@@ -748,7 +748,7 @@ dest(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst)
          if (err == -1)
             return 0;
          if (brw_inst_dst_da16_subreg_nr(devinfo, inst))
-            format(file, ".%"PRIu64, brw_inst_dst_da16_subreg_nr(devinfo, inst) /
+            format(file, ".%"PRIu64, 16 * brw_inst_dst_da16_subreg_nr(devinfo, inst) /
                    reg_type_size[brw_inst_dst_reg_type(devinfo, inst)]);
          string(file, "<1>");
          err |= control(file, "writemask", writemask,
-- 
2.7.4