[Mesa-dev] [PATCH 3/4] radeonsi: set optimal settings in COMPUTE_RESOURCE_LIMITS

[Marek Olšák]

On Tue, Jul 19, 2016 at 3:41 PM, Nicolai Hähnle <nhaehnle at gmail.com> wrote:
> On 18.07.2016 14:14, Marek Olšák wrote:
>>
>> From: Marek Olšák <marek.olsak at amd.com>
>>
>> ported from Vulkan
>> ---
>>   src/gallium/drivers/radeonsi/si_compute.c | 8 ++++++--
>>   1 file changed, 6 insertions(+), 2 deletions(-)
>>
>> diff --git a/src/gallium/drivers/radeonsi/si_compute.c
>> b/src/gallium/drivers/radeonsi/si_compute.c
>> index 5a40286..e75f6bd 100644
>> --- a/src/gallium/drivers/radeonsi/si_compute.c
>> +++ b/src/gallium/drivers/radeonsi/si_compute.c
>> @@ -163,8 +163,7 @@ static void si_initialize_compute(struct si_context
>> *sctx)
>>         radeon_emit(cs, 0);
>>         radeon_emit(cs, 0);
>>
>> -       radeon_set_sh_reg_seq(cs, R_00B854_COMPUTE_RESOURCE_LIMITS, 3);
>> -       radeon_emit(cs, 0);
>> +       radeon_set_sh_reg_seq(cs, R_00B858_COMPUTE_STATIC_THREAD_MGMT_SE0,
>> 2);
>>         /* R_00B858_COMPUTE_STATIC_THREAD_MGMT_SE0 / SE1 */
>>         radeon_emit(cs, S_00B858_SH0_CU_EN(0xffff) |
>> S_00B858_SH1_CU_EN(0xffff));
>>         radeon_emit(cs, S_00B85C_SH0_CU_EN(0xffff) |
>> S_00B85C_SH1_CU_EN(0xffff));
>> @@ -400,6 +399,11 @@ static void si_emit_dispatch_packets(struct
>> si_context *sctx,
>>   {
>>         struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
>>         bool render_cond_bit = sctx->b.render_cond &&
>> !sctx->b.render_cond_force_off;
>> +       unsigned waves_per_threadgroup =
>> +               DIV_ROUND_UP(info->block[0] * info->block[1] *
>> info->block[2], 64);
>> +
>> +       radeon_set_sh_reg(cs, R_00B854_COMPUTE_RESOURCE_LIMITS,
>> +                         S_00B854_SIMD_DEST_CNTL(waves_per_threadgroup %
>> 4 == 0));
>
>
> Since waves_per_threadgroup is rounded up to a multiple of
> 64,waves_per_threadgroup % 4 == 0 is always true.

It's rounded up and *divided* by 64.

Marek