[Mesa-dev] V5 ARB_enhanced_layouts packing support for i965 Gen6+

[Alejandro Piñeiro]

On 19/07/16 08:33, Timothy Arceri wrote:
> V5:
>  - rebase on Ken's interpolation clean-ups [1]
>
> V4:
>  - add vec4 backend support and enable for Gen6+
>  
>  V3:
> - Rewrite patch 9 (add support for packing arrays) to not add
>  hacks to the type_size() functions.
>  - Add packing support for the load_output intrinsics (patch 12)
>  - Add glsl_dvec_type() helper (patch 8)
>  
>  V2:
>  - validation fixes patches 1-2
>  - added support for packing doubles now that explicit location
>   fixes have landed.
>  - fix various issues with intel debug output with new COMPONENT const
>  index.
>  
>  This adds component packing support for Gen6+.
>  
>  Series can be found in my component_packing_gen6+_v2 branch:
>  
>  https://github.com/tarceri/Mesa_arrays_of_arrays.git 
>
> [1] https://patchwork.freedesktop.org/series/10000/
>
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With some minor comments, I have just reviewed the patches that had
pending a review (I just skimmed those that were already reviewed by
Edward).

Having said so, I made a run of the enhanced_layouts piglit tests*, and
I got the following:

Haswell:
[240/240] skip: 31, pass: 209

(Most of the skips are related with double support, as haswell support
is not still on master, was sent to review just yesterday).

Broadwell and Skylake:
[240/240] skip: 14, pass: 225, fail: 1 |

Being the failing one:
spec/arb_enhanced_layouts/compiler/transform-feedback-layout-qualifiers/xfb_offset/invalid-block-with-double.vert

In any case, I think that this series could be pushed as it is. Just
saying in the case that you didn't notice it.

* Run as: ./piglit run tests/all.py -t arb_enhanced_layouts
results/enhanced_layouts

BR