[Mesa-dev] [PATCH 2/2] i965: Fix shared atomic intrinsics to pay attention to base.

[Jason Ekstrand]

On Jul 18, 2016 3:49 PM, "Kenneth Graunke" <kenneth at whitecape.org> wrote:
>
> Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
> ---
>  src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 15 +++++++++++++--
>  1 file changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> index 6265dc6..a39c37e 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> @@ -4177,13 +4177,24 @@ fs_visitor::nir_emit_shared_atomic(const
fs_builder &bld,
>        dest = get_nir_dest(instr->dest);
>
>     fs_reg surface = brw_imm_ud(GEN7_BTI_SLM);
> -   fs_reg offset = get_nir_src(instr->src[0]);
> +   fs_reg offset;
>     fs_reg data1 = get_nir_src(instr->src[1]);
>     fs_reg data2;
>     if (op == BRW_AOP_CMPWR)
>        data2 = get_nir_src(instr->src[2]);
>
> -   /* Emit the actual atomic operation operation */
> +   /* Get the offset */
> +   nir_const_value *const_offset = nir_src_as_const_value(instr->src[0]);
> +   if (const_offset) {
> +      offset = brw_imm_ud(instr->const_index[0] + const_offset->u32[0]);

Should we be using nir_intrinsic_base here instead of accessing the
const_index directly?

> +   } else {
> +      offset = vgrf(glsl_type::uint_type);
> +      bld.ADD(offset,
> +             retype(get_nir_src(instr->src[0]), BRW_REGISTER_TYPE_UD),
> +             brw_imm_ud(instr->const_index[0]));

Same here

> +   }
> +
> +   /* Emit the actua atomic operation operation */
>
>     fs_reg atomic_result = emit_untyped_atomic(bld, surface, offset,
>                                                data1, data2,
> --
> 2.9.0
>
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