[Mesa-dev] [PATCH 14/21] i965: Factor out isl_surf_dim/isl_dim_layout calculation into functions.

[Francisco Jerez]

The logic to calculate the right layout and dimensionality for a given
GL texture target is going to be useful elsewhere, factor it out from
intel_miptree_get_isl_surf().
---
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 71 ++++++++++++++++++---------
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h |  7 +++
 2 files changed, 55 insertions(+), 23 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index d53fd74..5bf9243 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -2993,21 +2993,41 @@ intel_miptree_unmap(struct brw_context *brw,
    intel_miptree_release_map(mt, level, slice);
 }
 
-void
-intel_miptree_get_isl_surf(struct brw_context *brw,
-                           const struct intel_mipmap_tree *mt,
-                           struct isl_surf *surf)
+enum isl_surf_dim
+get_isl_surf_dim(GLenum target)
 {
-   switch (mt->target) {
+   switch (target) {
    case GL_TEXTURE_1D:
-   case GL_TEXTURE_1D_ARRAY: {
-      surf->dim = ISL_SURF_DIM_1D;
-      if (brw->gen >= 9 && mt->tiling == I915_TILING_NONE)
-         surf->dim_layout = ISL_DIM_LAYOUT_GEN9_1D;
-      else
-         surf->dim_layout = ISL_DIM_LAYOUT_GEN4_2D;
-      break;
+   case GL_TEXTURE_1D_ARRAY:
+      return ISL_SURF_DIM_1D;
+
+   case GL_TEXTURE_2D:
+   case GL_TEXTURE_2D_ARRAY:
+   case GL_TEXTURE_RECTANGLE:
+   case GL_TEXTURE_CUBE_MAP:
+   case GL_TEXTURE_CUBE_MAP_ARRAY:
+   case GL_TEXTURE_2D_MULTISAMPLE:
+   case GL_TEXTURE_2D_MULTISAMPLE_ARRAY:
+   case GL_TEXTURE_EXTERNAL_OES:
+      return ISL_SURF_DIM_2D;
+
+   case GL_TEXTURE_3D:
+      return ISL_SURF_DIM_3D;
    }
+
+   unreachable("Invalid texture target");
+}
+
+enum isl_dim_layout
+get_isl_dim_layout(const struct brw_device_info *devinfo, uint32_t tiling,
+                   GLenum target)
+{
+   switch (target) {
+   case GL_TEXTURE_1D:
+   case GL_TEXTURE_1D_ARRAY:
+      return (devinfo->gen >= 9 && tiling == I915_TILING_NONE ?
+              ISL_DIM_LAYOUT_GEN9_1D : ISL_DIM_LAYOUT_GEN4_2D);
+
    case GL_TEXTURE_2D:
    case GL_TEXTURE_2D_ARRAY:
    case GL_TEXTURE_RECTANGLE:
@@ -3016,20 +3036,25 @@ intel_miptree_get_isl_surf(struct brw_context *brw,
    case GL_TEXTURE_2D_MULTISAMPLE:
    case GL_TEXTURE_2D_MULTISAMPLE_ARRAY:
    case GL_TEXTURE_EXTERNAL_OES:
-      surf->dim = ISL_SURF_DIM_2D;
-      surf->dim_layout = ISL_DIM_LAYOUT_GEN4_2D;
-      break;
+      return ISL_DIM_LAYOUT_GEN4_2D;
+
    case GL_TEXTURE_3D:
-      surf->dim = ISL_SURF_DIM_3D;
-      if (brw->gen >= 9)
-         surf->dim_layout = ISL_DIM_LAYOUT_GEN4_2D;
-      else
-         surf->dim_layout = ISL_DIM_LAYOUT_GEN4_3D;
-      break;
-   default:
-      unreachable("Invalid texture target");
+      return (devinfo->gen >= 9 ?
+              ISL_DIM_LAYOUT_GEN4_2D : ISL_DIM_LAYOUT_GEN4_3D);
    }
 
+   unreachable("Invalid texture target");
+}
+
+void
+intel_miptree_get_isl_surf(struct brw_context *brw,
+                           const struct intel_mipmap_tree *mt,
+                           struct isl_surf *surf)
+{
+   surf->dim = get_isl_surf_dim(mt->target);
+   surf->dim_layout = get_isl_dim_layout(brw->intelScreen->devinfo,
+                                         mt->tiling, mt->target);
+
    if (mt->num_samples > 1) {
       switch (mt->msaa_layout) {
       case INTEL_MSAA_LAYOUT_IMS:
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index f3bc9e1..4e22182 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -797,6 +797,13 @@ intel_miptree_get_image_offset(const struct intel_mipmap_tree *mt,
 			       GLuint level, GLuint slice,
 			       GLuint *x, GLuint *y);
 
+enum isl_surf_dim
+get_isl_surf_dim(GLenum target);
+
+enum isl_dim_layout
+get_isl_dim_layout(const struct brw_device_info *devinfo, uint32_t tiling,
+                   GLenum target);
+
 void
 intel_miptree_get_isl_surf(struct brw_context *brw,
                            const struct intel_mipmap_tree *mt,
-- 
2.9.0