[Mesa-dev] [PATCH 12/13] glsl/i965: call backend optimisations from glsl linker

[Timothy Arceri]

Here we get the backend to do its extra GLSL IR passes before
assigning varying and uniform locations.

We move the lower_variable_index_to_cond_assign() call to
brw_link_shader() as this must be called after we have done
varying packing to avoid regressions.

Broadwell shader-db results:

total instructions in shared programs: 8651650 -> 8644415 (-0.08%)
instructions in affected programs:     38754 -> 31519 (-18.67%)
helped:                                320
HURT:                                  0
---
 src/compiler/glsl/linker.cpp           | 18 ++++++++++++++++++
 src/mesa/drivers/dri/i965/brw_link.cpp | 32 +++++++++++++++++---------------
 2 files changed, 35 insertions(+), 15 deletions(-)

diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
index a2b1ce2..c5e75e3 100644
--- a/src/compiler/glsl/linker.cpp
+++ b/src/compiler/glsl/linker.cpp
@@ -4612,6 +4612,10 @@ link_varyings_and_uniforms(unsigned first, unsigned last,
          do_dead_builtin_varyings(ctx, sh, NULL, num_tfeedback_decls,
                                   tfeedback_decls);
 
+         if (ctx->Driver.ProcessGLSLIR) {
+            ctx->Driver.ProcessGLSLIR(ctx, prog, sh);
+         }
+
          if (prog->SeparateShader) {
             const uint64_t reserved_slots =
                reserved_varying_slot(sh, ir_var_shader_in);
@@ -4650,6 +4654,10 @@ link_varyings_and_uniforms(unsigned first, unsigned last,
                       next == MESA_SHADER_FRAGMENT ? num_tfeedback_decls : 0,
                       tfeedback_decls);
 
+            if (ctx->Driver.ProcessGLSLIR) {
+               ctx->Driver.ProcessGLSLIR(ctx, prog, sh_next);
+            }
+
             if (!assign_varying_locations(ctx, mem_ctx, prog, sh_i, sh_next,
                       next == MESA_SHADER_FRAGMENT ? num_tfeedback_decls : 0,
                       tfeedback_decls,
@@ -4670,6 +4678,10 @@ link_varyings_and_uniforms(unsigned first, unsigned last,
 
             next = i;
          }
+
+         if (ctx->Driver.ProcessGLSLIR) {
+            ctx->Driver.ProcessGLSLIR(ctx, prog, prog->_LinkedShaders[first]);
+         }
       }
    }
 
@@ -4677,6 +4689,12 @@ link_varyings_and_uniforms(unsigned first, unsigned last,
                              has_xfb_qualifiers))
       return false;
 
+   if (last == MESA_SHADER_COMPUTE) {
+      if (ctx->Driver.ProcessGLSLIR) {
+         ctx->Driver.ProcessGLSLIR(ctx, prog, prog->_LinkedShaders[last]);
+      }
+   }
+
    update_array_sizes(prog);
    link_assign_uniform_locations(prog, ctx, num_explicit_uniform_locs);
    link_assign_atomic_counter_resources(ctx, prog);
diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp b/src/mesa/drivers/dri/i965/brw_link.cpp
index 244c8f0..4c3a508 100644
--- a/src/mesa/drivers/dri/i965/brw_link.cpp
+++ b/src/mesa/drivers/dri/i965/brw_link.cpp
@@ -165,19 +165,6 @@ brw_process_glsl_ir(struct gl_context *ctx,
 
    do_copy_propagation(shader->ir);
 
-   bool lowered_variable_indexing =
-      lower_variable_index_to_cond_assign(shader->Stage, shader->ir,
-                                          options->EmitNoIndirectInput,
-                                          options->EmitNoIndirectOutput,
-                                          options->EmitNoIndirectTemp,
-                                          options->EmitNoIndirectUniform);
-
-   if (unlikely(brw->perf_debug && lowered_variable_indexing)) {
-      perf_debug("Unsupported form of variable indexing in %s; falling "
-                 "back to very inefficient code generation\n",
-                 _mesa_shader_stage_to_abbrev(shader->Stage));
-   }
-
    brw_common_opts(shader, ctx, false, compiler, options);
 
    validate_ir_tree(shader->ir);
@@ -231,9 +218,24 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
         return false;
       prog->Parameters = _mesa_new_parameter_list();
 
-      _mesa_copy_linked_program_data((gl_shader_stage) stage, shProg, prog);
+      const struct gl_shader_compiler_options *options =
+         &ctx->Const.ShaderCompilerOptions[shader->Stage];
+      bool lowered_variable_indexing =
+         lower_variable_index_to_cond_assign(shader->Stage, shader->ir,
+                                             options->EmitNoIndirectInput,
+                                             options->EmitNoIndirectOutput,
+                                             options->EmitNoIndirectTemp,
+                                             options->EmitNoIndirectUniform);
+
+      if (unlikely(brw->perf_debug && lowered_variable_indexing)) {
+         perf_debug("Unsupported form of variable indexing in %s; falling "
+                    "back to very inefficient code generation\n",
+                    _mesa_shader_stage_to_abbrev(shader->Stage));
+      }
+
+      brw_common_opts(shader, ctx, true, compiler, options);
 
-      brw_process_glsl_ir(ctx, shProg, shader);
+      _mesa_copy_linked_program_data((gl_shader_stage) stage, shProg, prog);
 
       /* Make a pass over the IR to add state references for any built-in
        * uniforms that are used.  This has to be done now (during linking).
-- 
2.7.4