[Mesa-dev] [PATCH 2/3] gm107/ir: add a legalize SSA pass for PFETCH

Samuel Pitoiset samuel.pitoiset at gmail.com
Wed Jul 27 09:48:35 UTC 2016



On 07/27/2016 01:24 AM, Ilia Mirkin wrote:
> On Tue, Jul 26, 2016 at 6:53 PM, Samuel Pitoiset
> <samuel.pitoiset at gmail.com> wrote:
>> PFETCH, actually ISBERD on GM107+ ISA only accepts a GPR for src0.
>>
>> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
>> ---
>>  .../nouveau/codegen/nv50_ir_lowering_gm107.cpp     | 33 ++++++++++++++++++++++
>>  .../nouveau/codegen/nv50_ir_lowering_gm107.h       | 11 ++++++++
>>  .../nouveau/codegen/nv50_ir_target_gm107.cpp       |  2 +-
>>  3 files changed, 45 insertions(+), 1 deletion(-)
>>
>> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp
>> index a5deaef..84ef4e0 100644
>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp
>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp
>> @@ -41,6 +41,39 @@ namespace nv50_ir {
>>     ((QOP_##q << 6) | (QOP_##r << 4) |           \
>>      (QOP_##s << 2) | (QOP_##t << 0))
>>
>> +void
>> +GM107LegalizeSSA::handlePFETCH(Instruction *i)
>> +{
>> +   Value *src0;
>> +
>> +   if (i->src(0).getFile() == FILE_GPR && !i->srcExists(1))
>> +      return;
>> +
>> +   bld.setPosition(i, false);
>> +   src0 = bld.getSSA();
>> +
>> +   if (i->srcExists(1))
>> +      bld.mkOp2(OP_ADD , TYPE_U32, src0, i->getSrc(0), i->getSrc(1));
>> +   else
>> +      bld.mkOp1(OP_MOV , TYPE_U32, src0, i->getSrc(0));
>> +
>> +   i->setSrc(0, src0);
>> +   i->setSrc(1, NULL);
>> +}
>> +
>> +bool
>> +GM107LegalizeSSA::visit(Instruction *i)
>> +{
>> +   switch (i->op) {
>> +   case OP_PFETCH:
>> +      handlePFETCH(i);
>> +      break;
>> +   default:
>> +      break;
>> +   }
>> +   return true;
>
> This should probably be
>
> return NVC0LegalizeSSA::visit(i);
>
> I'm a bit surprised that this passed without that... do we really not
> do anything useful in there?

Because NVC0LegalizeSSA::visit(Instructiob *i) is not defined. Only 
visit(Function *fn) and visit(BasicBlock *bb) are used by the NVC0 
legalize pass.

>
>> +}
>> +
>>  bool
>>  GM107LoweringPass::handleManualTXD(TexInstruction *i)
>>  {
>> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.h
>> index 036abf0..d8e326f 100644
>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.h
>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.h
>> @@ -15,4 +15,15 @@ private:
>>     bool handlePOPCNT(Instruction *);
>>  };
>>
>> +class GM107LegalizeSSA : public NVC0LegalizeSSA
>> +{
>> +private:
>> +   virtual bool visit(Instruction *);
>> +
>> +   void handlePFETCH(Instruction *);
>> +
>> +private:
>> +   BuildUtil bld;
>
> Make the other one protected instead...

Okay.

>
>> +};
>> +
>>  } // namespace nv50_ir
>> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_gm107.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_gm107.cpp
>> index 92caeb2..6b8f767 100644
>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_gm107.cpp
>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_gm107.cpp
>> @@ -80,7 +80,7 @@ TargetGM107::runLegalizePass(Program *prog, CGStage stage) const
>>        return pass.run(prog, false, true);
>>     } else
>>     if (stage == CG_STAGE_SSA) {
>> -      NVC0LegalizeSSA pass;
>> +      GM107LegalizeSSA pass;
>>        return pass.run(prog, false, true);
>>     }
>>     return false;
>> --
>> 2.9.0
>>
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