[Mesa-dev] [PATCH v2 29/35] i965/blorp: Only do offset hacks for fake W-tiling and IMS
Pohjolainen, Topi
topi.pohjolainen at intel.com
Thu Jul 28 14:33:13 UTC 2016
On Thu, Jul 28, 2016 at 05:29:44PM +0300, Pohjolainen, Topi wrote:
> On Thu, Jul 28, 2016 at 07:04:08AM -0700, Jason Ekstrand wrote:
> > On Jul 28, 2016 7:59 AM, "Pohjolainen, Topi"
> > <[1]topi.pohjolainen at intel.com> wrote:
> > >
> > > On Tue, Jul 26, 2016 at 03:02:20PM -0700, Jason Ekstrand wrote:
> > > > Since the dawn of time, blorp has used offsets directly to get at
> > different
> > > > mip levels and array slices of surfaces. This isn't really
> > necessary since
> > > > we can just use the base level/layer provided in the surface
> > state. While
> > > > it may have simplified blorp's original design, we haven't been
> > using the
> > > > blorp path for surface state on gen8 thanks to render compression
> > and
> > > > there's really no good need for it most of the time. This commit
> > restricts
> > > > such surface munging to the cases of fake W-tiling and fake
> > interleaved
> > > > multisampling.
> > > > ---
> > > > src/mesa/drivers/dri/i965/brw_blorp.c | 74 ++---------
> > > > src/mesa/drivers/dri/i965/brw_blorp.h | 6 +
> > > > src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 185
> > +++++++++++++++++++--------
> > > > 3 files changed, 152 insertions(+), 113 deletions(-)
> > > >
> > > > diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c
> > b/src/mesa/drivers/dri/i965/brw_blorp.c
> > > > index 64e507a..215f765 100644
> > > > --- a/src/mesa/drivers/dri/i965/brw_blorp.c
> > > > +++ b/src/mesa/drivers/dri/i965/brw_blorp.c
> > > > @@ -90,7 +90,7 @@ get_image_offset_sa_gen6_stencil(const struct
> > isl_surf *surf,
> > > > *y_offset_sa = y;
> > > > }
> > > >
> > > > -static void
> > > > +void
> > >
> > > I noticed that this is now only used in brw_blorp_blit.cpp, should we
> > just
> > > move it there instead?
> >
> > It gets deleted entirely later.
Ah, okay. This patch is also:
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
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