[Mesa-dev] [PATCH v2 08/27] i965/blorp: Stop using the miptree in state setup for tex/rt surfaces
Pohjolainen, Topi
topi.pohjolainen at intel.com
Fri Jul 29 06:44:05 UTC 2016
On Thu, Jul 28, 2016 at 11:41:01AM -0700, Jason Ekstrand wrote:
> On Jul 28, 2016 12:34 PM, "Pohjolainen, Topi"
> <[1]topi.pohjolainen at intel.com> wrote:
> >
> > On Tue, Jul 26, 2016 at 03:11:12PM -0700, Jason Ekstrand wrote:
> > > Instead, we add a bo and offset field to brw_blorp_surface_info and
> use
> > > those in the backend.
> > > ---
> > > src/mesa/drivers/dri/i965/brw_blorp.c | 10 +++++---
> > > src/mesa/drivers/dri/i965/brw_blorp.h | 3 ++-
> > > src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 4 +++-
> > > src/mesa/drivers/dri/i965/gen6_blorp.c | 33
> +++++++++++---------------
> > > src/mesa/drivers/dri/i965/gen7_blorp.c | 35
> ++++++++++++----------------
> > > src/mesa/drivers/dri/i965/gen8_blorp.c | 10 ++++----
> > > 6 files changed, 45 insertions(+), 50 deletions(-)
> > >
> > > diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c
> b/src/mesa/drivers/dri/i965/brw_blorp.c
> > > index 87d8929..cf1615f 100644
> > > --- a/src/mesa/drivers/dri/i965/brw_blorp.c
> > > +++ b/src/mesa/drivers/dri/i965/brw_blorp.c
> > > @@ -126,8 +126,12 @@ brw_blorp_surface_info_init(struct brw_context
> *brw,
> > > intel_miptree_check_level_layer(mt, level, layer);
> > >
> > > info->mt = mt;
> > > + if (is_render_target)
> > > + intel_miptree_used_for_rendering(mt);
> > >
> > > intel_miptree_get_isl_surf(brw, mt, &info->surf);
> > > + info->bo = mt->bo;
> > > + info->offset = mt->offset;
> > >
> > > if (mt->mcs_mt) {
> > > intel_miptree_get_aux_isl_surf(brw, mt, &info->aux_surf,
> > > @@ -360,7 +364,7 @@ brw_blorp_emit_surface_state(struct brw_context
> *brw,
> > > const uint32_t mocs = is_render_target ? ss_info.rb_mocs :
> ss_info.tex_mocs;
> > >
> > > isl_surf_fill_state(&brw->isl_dev, dw, .surf = &surf, .view =
> &surface->view,
> > > - .address = surface->mt->bo->offset64 +
> surface->bo_offset,
> > > + .address = surface->bo->offset64 +
> surface->offset,
> > > .aux_surf = aux_surf, .aux_usage =
> surface->aux_usage,
> > > .aux_address = aux_offset,
> > > .mocs = mocs, .clear_color = clear_color,
> > > @@ -370,8 +374,8 @@ brw_blorp_emit_surface_state(struct brw_context
> *brw,
> > > /* Emit relocation to surface contents */
> > > drm_intel_bo_emit_reloc(brw->[2]batch.bo,
> > > surf_offset + ss_info.reloc_dw * 4,
> > > - surface->mt->bo,
> > > - dw[ss_info.reloc_dw] -
> surface->mt->bo->offset64,
> > > + surface->bo,
> > > + dw[ss_info.reloc_dw] -
> surface->bo->offset64,
> > > read_domains, write_domain);
> > >
> > > if (aux_surf) {
> > > diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h
> b/src/mesa/drivers/dri/i965/brw_blorp.h
> > > index 076d26d..98a9436 100644
> > > --- a/src/mesa/drivers/dri/i965/brw_blorp.h
> > > +++ b/src/mesa/drivers/dri/i965/brw_blorp.h
> > > @@ -72,6 +72,8 @@ struct brw_blorp_surface_info
> > > struct intel_mipmap_tree *mt;
> > >
> > > struct isl_surf surf;
> > > + drm_intel_bo *bo;
> > > + uint32_t offset;
> > >
> > > struct isl_surf aux_surf;
> > > enum isl_aux_usage aux_usage;
> > > @@ -81,7 +83,6 @@ struct brw_blorp_surface_info
> > > /* Z offset into a 3-D texture or slice of a 2-D array texture.
> */
> > > uint32_t z_offset;
> > >
> > > - uint32_t bo_offset;
> > > uint32_t tile_x_sa, tile_y_sa;
> > > };
> > >
> > > diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
> b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
> > > index ed68734..ee34a70 100644
> > > --- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
> > > +++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
> > > @@ -1604,11 +1604,13 @@ surf_convert_to_single_slice(struct
> brw_context *brw,
> > > info->view.base_array_layer,
> > > &x_offset_sa, &y_offset_sa);
> > >
> > > + uint32_t byte_offset;
> > > isl_tiling_get_intratile_offset_sa(&brw->isl_dev,
> info->surf.tiling,
> > > info->view.format,
> info->surf.row_pitch,
> > > x_offset_sa, y_offset_sa,
> > > - &info->bo_offset,
> > > + &byte_offset,
> > > &info->tile_x_sa,
> &info->tile_y_sa);
> > > + info->offset += byte_offset;
> > >
> > > /* TODO: Once this file gets converted to C, we shouls just use
> designated
> > > * initializers.
> > > diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.c
> b/src/mesa/drivers/dri/i965/gen6_blorp.c
> > > index 9e08374..6f3073b 100644
> > > --- a/src/mesa/drivers/dri/i965/gen6_blorp.c
> > > +++ b/src/mesa/drivers/dri/i965/gen6_blorp.c
> > > @@ -634,7 +634,7 @@ gen6_blorp_emit_wm_config(struct brw_context
> *brw,
> > > dw5 |= GEN6_WM_16_DISPATCH_ENABLE;
> > > }
> > >
> > > - if (params->[3]src.mt) {
> > > + if (params->[4]src.bo) {
> > > dw5 |= GEN6_WM_KILL_ENABLE; /* TODO: temporarily smash on */
> > > dw2 |= 1 << GEN6_WM_SAMPLER_COUNT_SHIFT; /* Up to 4 samplers
> */
> > > }
> > > @@ -700,20 +700,16 @@ gen6_blorp_emit_depth_stencil_config(struct
> brw_context *brw,
> > > const struct brw_blorp_params
> *params)
> > > {
> > > uint32_t surftype;
> > > - GLenum gl_target = params->depth.mt->target;
> > > -
> > > - switch (gl_target) {
> > > - case GL_TEXTURE_CUBE_MAP_ARRAY:
> > > - case GL_TEXTURE_CUBE_MAP:
> > > - /* The PRM claims that we should use BRW_SURFACE_CUBE for
> this
> > > - * situation, but experiments show that gl_Layer doesn't
> work when we do
> > > - * this. So we use BRW_SURFACE_2D, since for rendering
> purposes this is
> > > - * equivalent.
> > > - */
> > > +
> > > + switch (params->depth.surf.dim) {
> > > + case ISL_SURF_DIM_1D:
> > > + surftype = BRW_SURFACE_1D;
> > > + break;
> > > + case ISL_SURF_DIM_2D:
> > > surftype = BRW_SURFACE_2D;
> > > break;
> > > - default:
> > > - surftype = translate_tex_target(gl_target);
> > > + case ISL_SURF_DIM_3D:
> > > + surftype = BRW_SURFACE_3D;
> > > break;
> > > }
> > >
> > > @@ -738,9 +734,9 @@ gen6_blorp_emit_depth_stencil_config(struct
> brw_context *brw,
> > > surftype << 29);
> > >
> > > /* 3DSTATE_DEPTH_BUFFER dw2 */
> > > - OUT_RELOC(params->depth.mt->bo,
> > > + OUT_RELOC(params->[5]depth.bo,
> > > I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
> > > - 0);
> > > + params->depth.offset);
> >
> > This looks like a functional change.
>
> Yes and no. Depth miptrees are always at offset 0 right now. However,
> when we start using this in Vulkan that will not be the case so I
> wanted to "fix" it while I was here.
Could you add a small note in the commit message for this?
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