[Mesa-dev] [PATCH] i965/hsw: Initialize SLM index in state register
Matt Turner
mattst88 at gmail.com
Sun Mar 6 01:54:55 UTC 2016
On Sat, Mar 5, 2016 at 4:02 PM, Jordan Justen <jordan.l.justen at intel.com> wrote:
> On 2016-03-04 16:07:08, Matt Turner wrote:
>> Alternatively, if overwriting FFTID is bad, instead of emitting
>>
>> shr(1) sr0.1:UD g0.0:UD 16UD
>>
>> you could write only the low word:
>>
>> mov(1) sr0.2:UW g0.1:UW
>>
>> or maybe use an AND to ensure you're writing zeros to the MBZ bits of
>> the status register.
>
> Ok, with Matt's suggestion, it is pretty easy to remove the FFTID
> concern. I made this change:
>
> - abld.SHR(suboffset(brw_sr0_reg(), 1), g0, brw_imm_d(16));
> + abld.MOV(retype(suboffset(brw_sr0_reg(), 1), BRW_REGISTER_TYPE_UW),
> + suboffset(retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW), 1));
>
> Which produces:
>
> mov(1) sr0.2<1>UW g0.1<0,1,0>UW { align1 WE_all };
>
> And, therefore shouldn't touch the FFTID bits in the upper 16-bits of
> sr0.1.
>
> Matt, Ken: Does that look okay?
Yep, looks good to me. Keep my R-b. Thanks!
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