[Mesa-dev] [PATCH] nvc0/ir: make sure that thread count immediate for BAR fit

[Ilia Mirkin]

Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>

On Mon, Mar 7, 2016 at 12:29 PM, Samuel Pitoiset
<samuel.pitoiset at gmail.com> wrote:
> The limit of the thread count immediate value is 12 bits.
>
> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
> ---
>  src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
> index f172b72..d61109f 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
> @@ -1482,6 +1482,7 @@ CodeEmitterNVC0::emitBAR(const Instruction *i)
>     } else {
>        ImmediateValue *imm = i->getSrc(1)->asImm();
>        assert(imm);
> +      assert(imm->reg.data.u32 <= 0xfff);
>        code[0] |= imm->reg.data.u32 << 26;
>        code[1] |= imm->reg.data.u32 >> 6;
>        code[1] |= 0x4000;
> --
> 2.7.1
>
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