[Mesa-dev] [PATCH 0/9] Skip automatic execsize for instructions with a width of 4

[Samuel Iglesias Gonsálvez]

On 10/03/16 10:27, Pohjolainen, Topi wrote:
> On Mon, Mar 07, 2016 at 10:48:49AM +0100, Samuel Iglesias Gons?lvez wrote:
>> Hello,
>>
>> There is only one patch from this series that has been reviewed (patch
>> 1).
>>
>> Our plans is to start sending patches for adding fp64 support to i965
>> driver in the coming weeks but they depend on these patches.
>>
>> Can someone take a look at them? ;)
>>
>> Sam
>>
>>
>> On Thu, 2015-12-17 at 14:44 +0100, Samuel Iglesias Gonsálvez wrote:
>>> Hello,
>>>
>>> This patch series is a updated version of the one Iago sent last
>>> week [0] that includes patches for gen6 too, as suggested by Jason.
>>>
>>> We checked the gen9 code paths that work with a horizontal width of 4
>>> and we think there won't be any regression on gen9... but we don't
>>> have any gen9 machine to run piglit with these patches. Can someone
>>> check it?
>>>
>>> Please read the original cover letter [0] for more information.
>>>
>>> Sam
>>>
>>> [0] http://lists.freedesktop.org/archives/mesa-dev/2015-December/1027
>>> 46.html
>>>
>>> Iago Toral Quiroga (5):
>>>   i965/eu: set correct execution size in brw_NOP
>>>   i965/fs: set execution size for SEND messages in
>>>     generate_uniform_pull_constant_load_gen7
>>>   i965/eu: set execution size for SEND message in
>>>     brw_send_indirect_message
>>>   i965: set correct execsize for MOVS with a width of 4 in
>>>     brw_find_live_channel
>>>   i965: Skip execution size adjustment for instructions of width 4
>>>
>>> Samuel Iglesias Gonsálvez (4):
>>>   i965/gs/gen6: fix execsize for instructions with width of 4 in
>>>     gen6_sol_program()
> 
> Here we have:
> 
> @@ -406,9 +406,11 @@ gen6_sol_program(struct brw_ff_gs_compile *c, struct brw_ff_gs_prog_key *key,
>                                                  : 0x00020001)); /* (1, 0, 2) */
>           brw_inst_set_pred_control(p->devinfo, inst, BRW_PREDICATE_NORMAL);
>        }
> +      brw_push_insn_state(p);
> +      brw_set_default_exec_size(p, BRW_EXECUTE_4);
>        brw_ADD(p, c->reg.destination_indices,
>                c->reg.destination_indices, get_element_ud(c->reg.SVBI, 0));
> 
> I was wondering if we could add an assertion (serves as documention also):
> 
>        assert(c->reg.destination_indices.width == BRW_EXECUTE_4);
> 

Yes, we can add it. I will do it locally.

Sam