[Mesa-dev] [PATCH 12/30] i965/ir: Introduce backend_shader method to propagate IR changes to analysis passes.
Francisco Jerez
currojerez at riseup.net
Mon Mar 14 03:47:16 UTC 2016
The invalidate_analysis() method knows what analysis passes there are
in the back-end and calls their invalidate() method to report changes
in the IR. For the moment it just calls invalidate_live_intervals()
(which will eventually be fully replaced by this function) if anything
changed.
This makes all optimization passes invalidate DEPENDENCY_EVERYTHING,
which is clearly far from ideal -- The dependency classes passed to
invalidate_analysis() will be refined in a future commit.
---
.../drivers/dri/i965/brw_dead_control_flow.cpp | 4 +-
src/mesa/drivers/dri/i965/brw_fs.cpp | 49 ++++++++++++++--------
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
.../drivers/dri/i965/brw_fs_cmod_propagation.cpp | 4 +-
.../drivers/dri/i965/brw_fs_combine_constants.cpp | 2 +-
.../drivers/dri/i965/brw_fs_copy_propagation.cpp | 4 +-
src/mesa/drivers/dri/i965/brw_fs_cse.cpp | 2 +-
.../dri/i965/brw_fs_dead_code_eliminate.cpp | 4 +-
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 2 +-
.../drivers/dri/i965/brw_fs_register_coalesce.cpp | 4 +-
src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_predicated_break.cpp | 2 +-
.../drivers/dri/i965/brw_schedule_instructions.cpp | 4 +-
src/mesa/drivers/dri/i965/brw_shader.cpp | 7 ++++
src/mesa/drivers/dri/i965/brw_shader.h | 2 +
src/mesa/drivers/dri/i965/brw_vec4.cpp | 21 +++++++---
src/mesa/drivers/dri/i965/brw_vec4.h | 1 +
.../drivers/dri/i965/brw_vec4_cmod_propagation.cpp | 2 +-
.../drivers/dri/i965/brw_vec4_copy_propagation.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_vec4_cse.cpp | 2 +-
.../dri/i965/brw_vec4_dead_code_eliminate.cpp | 2 +-
.../drivers/dri/i965/brw_vec4_reg_allocate.cpp | 2 +-
22 files changed, 84 insertions(+), 41 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp b/src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp
index 2c1abaf..65e009c 100644
--- a/src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp
+++ b/src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp
@@ -29,6 +29,8 @@
#include "brw_shader.h"
#include "brw_cfg.h"
+using namespace brw;
+
/* Look for and eliminate dead control flow:
*
* - if/endif
@@ -109,7 +111,7 @@ dead_control_flow_eliminate(backend_shader *s)
}
if (progress)
- s->invalidate_live_intervals();
+ s->invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 86d2bd9..60924b6 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1843,7 +1843,7 @@ fs_visitor::split_virtual_grfs()
}
}
}
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
}
/**
@@ -1884,7 +1884,7 @@ fs_visitor::compact_virtual_grfs()
} else {
remap_table[i] = new_index;
alloc.sizes[new_index] = alloc.sizes[i];
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
++new_index;
}
}
@@ -2088,7 +2088,7 @@ fs_visitor::demote_pull_constants()
inst->src[i].reg_offset = 0;
}
}
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
}
bool
@@ -2314,6 +2314,10 @@ fs_visitor::opt_algebraic()
}
}
}
+
+ if (progress)
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
+
return progress;
}
@@ -2363,7 +2367,7 @@ fs_visitor::opt_zero_samples()
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
@@ -2442,7 +2446,7 @@ fs_visitor::opt_sampler_eot()
* the instruction that this will replace.
*/
if (tex_inst->header_size != 0) {
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return true;
}
@@ -2475,7 +2479,7 @@ fs_visitor::opt_sampler_eot()
tex_inst->insert_before(cfg->blocks[cfg->num_blocks - 1], new_load_payload);
tex_inst->src[0] = send_header;
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return true;
}
@@ -2528,7 +2532,7 @@ fs_visitor::opt_register_renaming()
}
if (progress) {
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
for (unsigned i = 0; i < ARRAY_SIZE(delta_xy); i++) {
if (delta_xy[i].file == VGRF && remap[delta_xy[i].nr] != -1) {
@@ -2576,7 +2580,7 @@ fs_visitor::opt_redundant_discard_jumps()
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
@@ -2736,7 +2740,7 @@ fs_visitor::compute_to_mrf()
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
@@ -2785,6 +2789,9 @@ fs_visitor::eliminate_find_live_channel()
}
}
+ if (progress)
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
+
return progress;
}
@@ -2898,7 +2905,7 @@ fs_visitor::remove_duplicate_mrf_writes()
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
@@ -3083,7 +3090,7 @@ fs_visitor::insert_gen4_send_dependency_workarounds()
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
}
/**
@@ -3150,7 +3157,7 @@ fs_visitor::lower_uniform_pull_constant_loads()
inst->src[1] = payload;
inst->base_mrf = -1;
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
} else {
/* Before register allocation, we didn't tell the scheduler about the
* MRF we use. We know it's safe to use this MRF because nothing
@@ -3256,7 +3263,7 @@ fs_visitor::lower_load_payload()
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
@@ -3474,7 +3481,7 @@ fs_visitor::lower_integer_multiplication()
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
@@ -3504,7 +3511,7 @@ fs_visitor::lower_minmax()
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
@@ -4329,7 +4336,7 @@ fs_visitor::lower_logical_sends()
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
@@ -4606,7 +4613,7 @@ fs_visitor::lower_simd_width()
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
@@ -5072,6 +5079,12 @@ fs_visitor::calculate_register_pressure()
}
void
+fs_visitor::invalidate_analysis(brw::analysis_dependency_class c)
+{
+ backend_shader::invalidate_analysis(c);
+}
+
+void
fs_visitor::optimize()
{
/* Start by validating the shader we currently have. */
@@ -5201,7 +5214,7 @@ fs_visitor::fixup_3src_null_dest()
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
}
void
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index 3448275..e47a8e5 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -141,6 +141,7 @@ public:
void assign_constant_locations();
void demote_pull_constants();
void invalidate_live_intervals();
+ virtual void invalidate_analysis(brw::analysis_dependency_class c);
void calculate_live_intervals();
void calculate_register_pressure();
void validate();
diff --git a/src/mesa/drivers/dri/i965/brw_fs_cmod_propagation.cpp b/src/mesa/drivers/dri/i965/brw_fs_cmod_propagation.cpp
index b5badae..03835dd 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_cmod_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_cmod_propagation.cpp
@@ -25,6 +25,8 @@
#include "brw_cfg.h"
#include "brw_eu.h"
+using namespace brw;
+
/** @file brw_fs_cmod_propagation.cpp
*
* Implements a pass that propagates the conditional modifier from a CMP x 0.0
@@ -164,7 +166,7 @@ fs_visitor::opt_cmod_propagation()
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
diff --git a/src/mesa/drivers/dri/i965/brw_fs_combine_constants.cpp b/src/mesa/drivers/dri/i965/brw_fs_combine_constants.cpp
index d7a1456..c89fc47 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_combine_constants.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_combine_constants.cpp
@@ -324,7 +324,7 @@ fs_visitor::opt_combine_constants()
}
ralloc_free(const_ctx);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return true;
}
diff --git a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
index 2616e65..590b92f 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
@@ -39,6 +39,8 @@
#include "brw_cfg.h"
#include "brw_eu.h"
+using namespace brw;
+
namespace { /* avoid conflict with opt_copy_propagation_elements */
struct acp_entry : public exec_node {
fs_reg dst;
@@ -841,7 +843,7 @@ fs_visitor::opt_copy_propagate()
ralloc_free(copy_prop_ctx);
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
diff --git a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
index 0e743de..4e85fb9 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
@@ -356,7 +356,7 @@ fs_visitor::opt_cse()
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
diff --git a/src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp b/src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp
index bd57e09..84e4741 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp
@@ -34,6 +34,8 @@
* yet in the tail end of this block.
*/
+using namespace brw;
+
bool
fs_visitor::dead_code_eliminate()
{
@@ -131,7 +133,7 @@ fs_visitor::dead_code_eliminate()
ralloc_free(flag_live);
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
index 2347cd5..654bf03 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
@@ -947,5 +947,5 @@ fs_visitor::spill_reg(int spill_reg)
}
}
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
}
diff --git a/src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp b/src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp
index 4578ad5..16bef19 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp
@@ -44,6 +44,8 @@
#include "brw_cfg.h"
#include "brw_fs_live_variables.h"
+using namespace brw;
+
static bool
is_nop_mov(const fs_inst *inst)
{
@@ -285,7 +287,7 @@ fs_visitor::register_coalesce()
}
}
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
}
return progress;
diff --git a/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp b/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
index 8613725..a6799d0 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
@@ -214,7 +214,7 @@ fs_visitor::opt_peephole_sel()
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
diff --git a/src/mesa/drivers/dri/i965/brw_predicated_break.cpp b/src/mesa/drivers/dri/i965/brw_predicated_break.cpp
index 8aeaa24..46843a6 100644
--- a/src/mesa/drivers/dri/i965/brw_predicated_break.cpp
+++ b/src/mesa/drivers/dri/i965/brw_predicated_break.cpp
@@ -142,7 +142,7 @@ opt_predicated_break(backend_shader *s)
}
if (progress)
- s->invalidate_live_intervals();
+ s->invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
index 5b54b51..d2b6eb1 100644
--- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
+++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
@@ -1679,7 +1679,7 @@ fs_visitor::schedule_instructions(instruction_scheduler_mode mode)
stage_abbrev, dispatch_width, sched.time);
}
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
}
void
@@ -1693,5 +1693,5 @@ vec4_visitor::opt_schedule_instructions()
stage_abbrev, sched.time);
}
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
}
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 21977a2..5b05725 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -1046,6 +1046,13 @@ backend_shader::calculate_cfg()
cfg = new(mem_ctx) cfg_t(&this->instructions);
}
+void
+backend_shader::invalidate_analysis(brw::analysis_dependency_class c)
+{
+ if (c)
+ invalidate_live_intervals();
+}
+
/**
* Sets up the starting offsets for the groups of binding table entries
* commong to all pipeline stages.
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
index 81d3f96..47e6f02 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -30,6 +30,7 @@
#include "brw_cfg.h"
#ifdef __cplusplus
+#include "brw_ir_analysis.h"
#include "brw_ir_allocator.h"
enum instruction_scheduler_mode {
@@ -83,6 +84,7 @@ public:
void calculate_cfg();
virtual void invalidate_live_intervals() = 0;
+ virtual void invalidate_analysis(brw::analysis_dependency_class c);
};
uint32_t brw_texture_offset(int *offsets, unsigned num_components);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index a3d1f7c..2e67b89 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -400,7 +400,7 @@ vec4_visitor::opt_vector_float()
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
@@ -469,7 +469,7 @@ vec4_visitor::opt_reduce_swizzle()
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
@@ -725,7 +725,7 @@ vec4_visitor::opt_algebraic()
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
@@ -1207,7 +1207,7 @@ vec4_visitor::opt_register_coalesce()
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
@@ -1249,6 +1249,9 @@ vec4_visitor::eliminate_find_live_channel()
}
}
+ if (progress)
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
+
return progress;
}
@@ -1323,7 +1326,7 @@ vec4_visitor::split_virtual_grfs()
}
}
}
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
}
void
@@ -1676,7 +1679,7 @@ vec4_visitor::lower_minmax()
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
@@ -1869,6 +1872,12 @@ vec4_visitor::convert_to_hw_regs()
}
}
+void
+vec4_visitor::invalidate_analysis(brw::analysis_dependency_class c)
+{
+ backend_shader::invalidate_analysis(c);
+}
+
bool
vec4_visitor::run()
{
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index b56b35d..c3f9ca5 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -136,6 +136,7 @@ public:
void pack_uniform_registers();
void calculate_live_intervals();
void invalidate_live_intervals();
+ virtual void invalidate_analysis(brw::analysis_dependency_class c);
void split_virtual_grfs();
bool opt_vector_float();
bool opt_reduce_swizzle();
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_cmod_propagation.cpp b/src/mesa/drivers/dri/i965/brw_vec4_cmod_propagation.cpp
index 0c8224f..b22be97 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_cmod_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_cmod_propagation.cpp
@@ -150,7 +150,7 @@ vec4_visitor::opt_cmod_propagation()
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
index 92423e1..f5f6879 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
@@ -488,7 +488,7 @@ vec4_visitor::opt_copy_propagation(bool do_constant_prop)
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp b/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp
index 0c1f0c3..57c2137 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp
@@ -275,7 +275,7 @@ vec4_visitor::opt_cse()
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_dead_code_eliminate.cpp b/src/mesa/drivers/dri/i965/brw_vec4_dead_code_eliminate.cpp
index 166bc17..22934fe 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_dead_code_eliminate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_dead_code_eliminate.cpp
@@ -182,7 +182,7 @@ vec4_visitor::dead_code_eliminate()
ralloc_free(flag_live);
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
return progress;
}
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
index afc3266..3f90b4e 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
@@ -482,7 +482,7 @@ vec4_visitor::spill_reg(int spill_reg_nr)
}
}
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
}
} /* namespace brw */
--
2.7.0
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