[Mesa-dev] [PATCH] radeonsi: fix Hyper-Z hangs on P2 configs

[Nicolai Hähnle]

If I understand your patch correctly, the only effect is that a larger 
HTILE buffer is allocated, right? I'm surprised that only hangs were 
reported and not VM faults. We should really introduce guard pages / 
gaps between mapped buffers.

It seems like htile.{pitch, height, xalign, yalign} are never used 
(outside of some debug printing). I think it's a good idea to remove 
them (in a separate patch of course).

In any case, this patch is

Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

On 15.03.2016 16:47, Marek Olšák wrote:
> From: Marek Olšák <marek.olsak at amd.com>
>
> Cc: 11.1 11.2 <mesa-stable at lists.freedesktop.org>
> ---
>   src/gallium/drivers/radeon/r600_texture.c | 10 ++++++++--
>   1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
> index 115c728..3957e71 100644
> --- a/src/gallium/drivers/radeon/r600_texture.c
> +++ b/src/gallium/drivers/radeon/r600_texture.c
> @@ -629,8 +629,14 @@ static unsigned r600_texture_get_htile_size(struct r600_common_screen *rscreen,
>   	    rscreen->info.drm_major == 2 && rscreen->info.drm_minor < 38)
>   		return 0;
>
> -	/* Overalign HTILE on Stoney to fix piglit/depthstencil-render-miplevels 585. */
> -	if (rscreen->family == CHIP_STONEY)
> +	/* Overalign HTILE on P2 configs to work around GPU hangs in
> +	 * piglit/depthstencil-render-miplevels 585.
> +	 *
> +	 * This has been confirmed to help Kabini & Stoney, where the hangs
> +	 * are always reproducible. I think I have seen the test hang
> +	 * on Carrizo too, though it was very rare there.
> +	 */
> +	if (rscreen->chip_class >= CIK && num_pipes < 4)
>   		num_pipes = 4;
>
>   	switch (num_pipes) {
>