[Mesa-dev] [PATCH] nv50/ir: Split 64-bit MAD and MUL operations

[Ilia Mirkin]

Not 100% sure, but pretty sure this is wrong. Can you provide the
generated sequence of instructions in response to a 64-bit mul and
mad?

On Sat, Mar 19, 2016 at 5:56 PM, Pierre Moreau <pierre.morrow at free.fr> wrote:
> Two 32-bit MAD or MUL operations are generated in place of the original 64-bit
> operation. All operands can either be signed or unsigned, but they have to be
> integers.
>
> Signed-off-by: Pierre Moreau <pierre.morrow at free.fr>
> ---
>  src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp | 11 ++++++++++-
>  1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
> index 84ebfdb..0b37fcf 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
> @@ -586,6 +586,12 @@ BuildUtil::split64BitOpPostRA(Function *fn, Instruction *i,
>        srcNr = 2;
>        break;
>     case OP_SELP: srcNr = 3; break;
> +   case OP_MAD: /* fallthrough */
> +   case OP_MUL:
> +      if (!carry || isFloatType(i->dType) || isFloatType(i->sType))
> +         return NULL;
> +      srcNr = (i->op == OP_MAD) ? 3 : 2;
> +      break;
>     default:
>        // TODO when needed
>        return NULL;
> @@ -600,6 +606,9 @@ BuildUtil::split64BitOpPostRA(Function *fn, Instruction *i,
>
>     hi->getDef(0)->reg.data.id++;
>
> +   if (i->op == OP_MAD || i->op == OP_MUL)
> +      hi->subOp = NV50_IR_SUBOP_MUL_HIGH;
> +
>     for (int s = 0; s < srcNr; ++s) {
>        if (lo->getSrc(s)->reg.size < 8) {
>           if (s == 2)
> @@ -629,7 +638,7 @@ BuildUtil::split64BitOpPostRA(Function *fn, Instruction *i,
>           }
>        }
>     }
> -   if (srcNr == 2) {
> +   if (srcNr >= 2) {
>        lo->setFlagsDef(1, carry);
>        hi->setFlagsSrc(hi->srcCount(), carry);
>     }
> --
> 2.7.4
>
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