[Mesa-dev] [PATCH] i965: Use brw->urb.min_vs_urb_entries instead of 32 for BLORP.

[Alejandro Piñeiro]

On 31/03/16 11:18, Kenneth Graunke wrote:
> Haswell GT2 and GT3 have a minimum of 64 entries.  Hardcoding 32
> is not legal.
>
> Cc: mesa-stable at lists.freedesktop.org
> Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
> ---
>  src/mesa/drivers/dri/i965/gen7_blorp.cpp | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
> index 89b73ca..a89d5d7 100644
> --- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
> +++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
> @@ -59,7 +59,7 @@ gen7_blorp_emit_urb_config(struct brw_context *brw)
>      * 1.15:0 "VS Number of URB Entries".
>      */

Then I think that this comment needs to be updated too. Copying the full
comment here:
   /* The minimum valid number of VS entries is 32. See 3DSTATE_URB_VS,
Dword
    * 1.15:0 "VS Number of URB Entries".
    */


>     gen7_emit_urb_state(brw,
> -                       32 /* num_vs_entries */,
> +                       brw->urb.min_vs_entries /* num_vs_entries */,
>                         2 /* vs_size */,
>                         2 /* vs_start */,
>                         0 /* num_hs_entries */,