[Mesa-dev] [PATCH 08/10] winsys/amdgpu: pass PIPE_CONFIG to addrlib on texture import
Marek Olšák
maraeo at gmail.com
Sun May 1 13:51:13 UTC 2016
From: Marek Olšák <marek.olsak at amd.com>
This hasn't been needed, but I think we should set it.
---
src/gallium/drivers/radeon/r600_texture.c | 1 +
src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 1 +
src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 1 +
3 files changed, 3 insertions(+)
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 4841078..9aca0c2 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -1031,6 +1031,7 @@ static struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen
rscreen->ws->buffer_get_metadata(buf, &metadata);
+ surface.pipe_config = metadata.pipe_config;
surface.bankw = metadata.bankw;
surface.bankh = metadata.bankh;
surface.tile_split = metadata.tile_split;
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
index 4ab85ff..37a41c0 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
@@ -408,6 +408,7 @@ static void amdgpu_buffer_get_metadata(struct pb_buffer *_buf,
else if (AMDGPU_TILING_GET(tiling_flags, ARRAY_MODE) == 2) /* 1D_TILED_THIN1 */
md->microtile = RADEON_LAYOUT_TILED;
+ md->pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG);
md->bankw = 1 << AMDGPU_TILING_GET(tiling_flags, BANK_WIDTH);
md->bankh = 1 << AMDGPU_TILING_GET(tiling_flags, BANK_HEIGHT);
md->tile_split = eg_tile_split(AMDGPU_TILING_GET(tiling_flags, TILE_SPLIT));
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
index 0523f11..9da4faf 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
@@ -360,6 +360,7 @@ static int amdgpu_surface_init(struct radeon_winsys *rws,
AddrTileInfoIn.bankHeight = surf->bankh;
AddrTileInfoIn.macroAspectRatio = surf->mtilea;
AddrTileInfoIn.tileSplitBytes = surf->tile_split;
+ AddrTileInfoIn.pipeConfig = surf->pipe_config + 1; /* +1 compared to GB_TILE_MODE */
AddrSurfInfoIn.flags.degrade4Space = 0;
AddrSurfInfoIn.pTileInfo = &AddrTileInfoIn;
--
2.7.4
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