[Mesa-dev] [PATCH] r300g: set endian controls on big endian
Marek Olšák
maraeo at gmail.com
Sun May 1 14:01:38 UTC 2016
On Sun, May 1, 2016 at 2:43 PM, Michel Dänzer <michel at daenzer.net> wrote:
> On 24.04.2016 20:27, Marek Olšák wrote:
>> From: Marek Olšák <marek.olsak at amd.com>
>>
>> ---
>> src/gallium/drivers/r300/r300_reg.h | 20 +++++++----------
>> src/gallium/drivers/r300/r300_texture.c | 38 ++++++++++++++++++++++++++++++---
>> 2 files changed, 43 insertions(+), 15 deletions(-)
>>
>> diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h
>> index 9c373c5..9c93b84 100644
>> --- a/src/gallium/drivers/r300/r300_reg.h
>> +++ b/src/gallium/drivers/r300/r300_reg.h
>> @@ -1700,10 +1700,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
>> #define R300_TX_OFFSET_6 0x4558
>> #define R300_TX_OFFSET_7 0x455C
>>
>> -# define R300_TXO_ENDIAN_NO_SWAP (0 << 0)
>> -# define R300_TXO_ENDIAN_BYTE_SWAP (1 << 0)
>> -# define R300_TXO_ENDIAN_WORD_SWAP (2 << 0)
>> -# define R300_TXO_ENDIAN_HALFDW_SWAP (3 << 0)
>> +# define R300_TXO_ENDIAN(x) ((x) << 0)
>> # define R300_TXO_MACRO_TILE_LINEAR (0 << 2)
>> # define R300_TXO_MACRO_TILE_TILED (1 << 2)
>> # define R300_TXO_MACRO_TILE(x) ((x) << 2)
>> @@ -2418,10 +2415,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
>> # define R300_COLOR_MICROTILE_ENABLE (1 << 17)
>> # define R300_COLOR_MICROTILE_ENABLE_SQUARE (2 << 17) /* Only available in 16-bit */
>> # define R300_COLOR_MICROTILE(x) ((x) << 17)
>> -# define R300_COLOR_ENDIAN_NO_SWAP (0 << 19)
>> -# define R300_COLOR_ENDIAN_WORD_SWAP (1 << 19)
>> -# define R300_COLOR_ENDIAN_DWORD_SWAP (2 << 19)
>> -# define R300_COLOR_ENDIAN_HALF_DWORD_SWAP (3 << 19)
>> +# define R300_COLOR_ENDIAN(x) ((x) << 19)
>> # define R500_COLOR_FORMAT_ARGB10101010 (0 << 21)
>> # define R500_COLOR_FORMAT_UV1010 (1 << 21)
>> # define R500_COLOR_FORMAT_CI8 (2 << 21) /* 2D only */
>
> Did you or anyone else test this patch? Back when I fixed the classic
> r300 driver to work on big endian hosts, none of these bits seemed to
> have any effect unfortunately. It's possible I did something wrong then
> though.
Yes and the patch doesn't work. (bugzilla contains an updated patch that works)
I think the reason the endian bits didn't work for you is that you set
the swizzle according to u_format.csv and also the endian swap, so the
component order was reversed twice. This is the correct way, compare:
BGRA implementation:
- program everything like BGRA
- set endian swap to 0
- works the same on LE and BE, because it's an array format
ARGB implementation:
- program everything like BGRA (I mean EVERYTHING)
- set endian swap to DWORD swap
- works the same on LE and BE, because it's an array format
And my latest patch does exactly that.
Marek
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