[Mesa-dev] [PATCH 2/8] i965: Pass devinfo pointer to is_3src() helpers.

[Matt Turner]

From: Francisco Jerez <currojerez at riseup.net>

This is not strictly required for the following changes because none
of the three-source opcodes we support at the moment in the compiler
back-end has been removed or redefined, but that's likely to change in
the future.  In any case having hardware instructions specified as a
pair of hardware device and opcode number explicitly in all cases will
simplify the opcode look-up interface introduced in a subsequent
commit, since the opcode number alone is in general ambiguous.

Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
---
 src/mesa/drivers/dri/i965/brw_eu.h                      | 2 +-
 src/mesa/drivers/dri/i965/brw_eu_compact.c              | 5 +++--
 src/mesa/drivers/dri/i965/brw_fs.cpp                    | 2 +-
 src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp   | 2 +-
 src/mesa/drivers/dri/i965/brw_shader.cpp                | 4 ++--
 src/mesa/drivers/dri/i965/brw_shader.h                  | 2 +-
 src/mesa/drivers/dri/i965/brw_vec4.cpp                  | 2 +-
 src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp | 2 +-
 8 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index 08ad63a..89b4e7f 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -546,7 +546,7 @@ next_offset(const struct brw_device_info *devinfo, void *store, int offset)
 }
 
 static inline bool
-is_3src(enum opcode opcode)
+is_3src(const struct brw_device_info *devinfo, enum opcode opcode)
 {
    return opcode_descs[opcode].nsrc == 3;
 }
diff --git a/src/mesa/drivers/dri/i965/brw_eu_compact.c b/src/mesa/drivers/dri/i965/brw_eu_compact.c
index bca8a84..5ae3fdd 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_compact.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_compact.c
@@ -968,7 +968,7 @@ brw_try_compact_instruction(const struct brw_device_info *devinfo,
 
    assert(brw_inst_cmpt_control(devinfo, src) == 0);
 
-   if (is_3src(brw_inst_opcode(devinfo, src))) {
+   if (is_3src(devinfo, brw_inst_opcode(devinfo, src))) {
       if (devinfo->gen >= 8) {
          memset(&temp, 0, sizeof(temp));
          if (brw_try_compact_3src_instruction(devinfo, &temp, src)) {
@@ -1202,7 +1202,8 @@ brw_uncompact_instruction(const struct brw_device_info *devinfo, brw_inst *dst,
 {
    memset(dst, 0, sizeof(*dst));
 
-   if (devinfo->gen >= 8 && is_3src(brw_compact_inst_3src_opcode(devinfo, src))) {
+   if (devinfo->gen >= 8 &&
+       is_3src(devinfo, brw_compact_inst_3src_opcode(devinfo, src))) {
       brw_uncompact_3src_instruction(devinfo, dst, src);
       return;
    }
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index c7c7a45..66263e3 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -5359,7 +5359,7 @@ fs_visitor::fixup_3src_null_dest()
    bool progress = false;
 
    foreach_block_and_inst_safe (block, fs_inst, inst, cfg) {
-      if (inst->is_3src() && inst->dst.is_null()) {
+      if (inst->is_3src(devinfo) && inst->dst.is_null()) {
          inst->dst = fs_reg(VGRF, alloc.allocate(dispatch_width / 8),
                             inst->dst.type);
          progress = true;
diff --git a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
index ffab0a8..2e8c84f 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
@@ -293,7 +293,7 @@ can_take_stride(fs_inst *inst, unsigned arg, unsigned stride,
     *    This is applicable to 32b datatypes and 16b datatype. 64b datatypes
     *    cannot use the replicate control.
     */
-   if (inst->is_3src()) {
+   if (inst->is_3src(devinfo)) {
       if (type_sz(inst->src[arg].type) > 4)
          return stride == 1;
       else
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index a2281a7..d417d3d 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -737,9 +737,9 @@ backend_instruction::is_commutative() const
 }
 
 bool
-backend_instruction::is_3src() const
+backend_instruction::is_3src(const struct brw_device_info *devinfo) const
 {
-   return ::is_3src(opcode);
+   return ::is_3src(devinfo, opcode);
 }
 
 bool
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
index 8ab8d5b..d77531c 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -101,7 +101,7 @@ struct bblock_t;
 
 #ifdef __cplusplus
 struct backend_instruction : public exec_node {
-   bool is_3src() const;
+   bool is_3src(const struct brw_device_info *devinfo) const;
    bool is_tex() const;
    bool is_math() const;
    bool is_control_flow() const;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index 599e45e..815eaed 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -1868,7 +1868,7 @@ vec4_visitor::convert_to_hw_regs()
          src = reg;
       }
 
-      if (inst->is_3src()) {
+      if (inst->is_3src(devinfo)) {
          /* 3-src instructions with scalar sources support arbitrary subnr,
           * but don't actually use swizzles.  Convert swizzle into subnr.
           */
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
index 92423e1..8faa241 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
@@ -324,7 +324,7 @@ try_copy_propagate(const struct brw_device_info *devinfo,
 
    unsigned composed_swizzle = brw_compose_swizzle(inst->src[arg].swizzle,
                                                    value.swizzle);
-   if (inst->is_3src() &&
+   if (inst->is_3src(devinfo) &&
        (value.file == UNIFORM ||
         (value.file == ATTR && attributes_per_reg != 1)) &&
        !brw_is_single_value_swizzle(composed_swizzle))
-- 
2.7.3