[Mesa-dev] [PATCH] i965/fs: Follow pow(16) instructions with a NOP.

[Matt Turner]

On Tue, May 3, 2016 at 3:28 PM, Francisco Jerez <currojerez at riseup.net> wrote:
> Matt Turner <mattst88 at gmail.com> writes:
>
>> Beginning with commit 7b208a73, Unigine Valley began hanging the GPU on
>> Gen >= 8 platforms. This patch avoids the GPU hangs, but does not
>> implement a full work around for the restriction (dispatch_width == 16
>> is an imperfect proxy).
>>
> Sounds like for a proper fix we could just check the last instruction in
> the assembly at the top of the generator loop and emit a NOP in cases
> where the previous instruction is one of the affected math opcodes?

If I assume correctly that you mean "so we can check if the following
instruction has two destination registers", then yes that would be
good.

What's the best way to check that?
inst->dst.component_size(inst->exec_size) > REG_SIZE ?